33 static void mctl_set_cr(struct dram_para *para)  in mctl_set_cr()  argument
38 	writel(MCTL_CR_CS1_CONTROL(para->cs1) | MCTL_CR_UNKNOWN |  in mctl_set_cr()
40 	       (para->seq ? MCTL_CR_SEQUENCE : 0) |  in mctl_set_cr()
41 	       ((para->bus_width == 16) ? MCTL_CR_BUSW16 : MCTL_CR_BUSW8) |  in mctl_set_cr()
42 	       MCTL_CR_PAGE_SIZE(para->page_size) | MCTL_CR_ROW(para->rows) |  in mctl_set_cr()
43 	       MCTL_CR_BANK(para->bank) | MCTL_CR_RANK(para->rank),  in mctl_set_cr()
47 static void auto_detect_dram_size(struct dram_para *para)  in auto_detect_dram_size()  argument
49 	u8 orig_rank = para->rank;  in auto_detect_dram_size()
53 	para->page_size = 512;  in auto_detect_dram_size()
54 	para->seq = 1;  in auto_detect_dram_size()
55 	para->rows = 16;  in auto_detect_dram_size()
56 	para->rank = 1;  in auto_detect_dram_size()
57 	mctl_set_cr(para);  in auto_detect_dram_size()
64 	para->rows = 11;  in auto_detect_dram_size()
65 	para->page_size = 8192;  in auto_detect_dram_size()
66 	mctl_set_cr(para);  in auto_detect_dram_size()
72 	para->seq = 0;  in auto_detect_dram_size()
73 	para->rank = orig_rank;  in auto_detect_dram_size()
74 	para->rows = rows;  in auto_detect_dram_size()
75 	para->page_size = 1 << columns;  in auto_detect_dram_size()
76 	mctl_set_cr(para);  in auto_detect_dram_size()
87 static void auto_set_timing_para(struct dram_para *para)  in auto_set_timing_para()  argument
132 	mctl_set_cr(para);  in auto_set_timing_para()
180 static void mctl_data_train_cfg(struct dram_para *para)  in mctl_data_train_cfg()  argument
185 	if (para->rank == 2)  in mctl_data_train_cfg()
191 static int mctl_train_dram(struct dram_para *para)  in mctl_train_dram()  argument
196 	mctl_data_train_cfg(para);  in mctl_train_dram()
202 static int mctl_channel_init(struct dram_para *para)  in mctl_channel_init()  argument
211 	auto_set_timing_para(para);  in mctl_channel_init()
232 	para->cs1 = 0;  in mctl_channel_init()
233 	para->rank = 2;  in mctl_channel_init()
234 	para->bus_width = 16;  in mctl_channel_init()
235 	mctl_set_cr(para);  in mctl_channel_init()
241 	mctl_data_train_cfg(para);  in mctl_channel_init()
252 	if (mctl_train_dram(para) != 0) {  in mctl_channel_init()
260 		para->rank = 1;  in mctl_channel_init()
261 		mctl_set_cr(para);  in mctl_channel_init()
268 			para->cs1 = 1;  in mctl_channel_init()
269 			mctl_set_cr(para);  in mctl_channel_init()
270 			if (mctl_train_dram(para) == 0)  in mctl_channel_init()
276 		para->cs1 = 0;  in mctl_channel_init()
277 		para->bus_width = 8;  in mctl_channel_init()
278 		mctl_set_cr(para);  in mctl_channel_init()
279 		if (mctl_train_dram(para) != 0)  in mctl_channel_init()
295 static void mctl_sys_init(struct dram_para *para)  in mctl_sys_init()  argument
335 	struct dram_para para = {  in sunxi_dram_init()  local
344 	mctl_sys_init(&para);  in sunxi_dram_init()
346 	if (mctl_channel_init(&para) != 0)  in sunxi_dram_init()
349 	auto_detect_dram_size(&para);  in sunxi_dram_init()
355 	if (para.rank == 2)  in sunxi_dram_init()
360 	return para.page_size * (para.bus_width / 8) *  in sunxi_dram_init()
361 		(1 << (para.bank + para.rank + para.rows));  in sunxi_dram_init()