Lines Matching refs:writel
43 writel(MDFS_CLK_DEFAULT, &ccm->mdfs_clk_cfg); in mctl_sys_init()
62 writel(MCTL_DLLCR_DISABLE, &mctl_phy->acdllcr); in mctl_dll_init()
63 writel(MCTL_DLLCR_DISABLE, &mctl_phy->dx0dllcr); in mctl_dll_init()
64 writel(MCTL_DLLCR_DISABLE, &mctl_phy->dx1dllcr); in mctl_dll_init()
66 writel(MCTL_DLLCR_DISABLE, &mctl_phy->dx2dllcr); in mctl_dll_init()
67 writel(MCTL_DLLCR_DISABLE, &mctl_phy->dx3dllcr); in mctl_dll_init()
72 writel(0, &mctl_phy->acdllcr); in mctl_dll_init()
73 writel(0, &mctl_phy->dx0dllcr); in mctl_dll_init()
74 writel(0, &mctl_phy->dx1dllcr); in mctl_dll_init()
76 writel(0, &mctl_phy->dx2dllcr); in mctl_dll_init()
77 writel(0, &mctl_phy->dx3dllcr); in mctl_dll_init()
82 writel(MCTL_DLLCR_NRESET, &mctl_phy->acdllcr); in mctl_dll_init()
83 writel(MCTL_DLLCR_NRESET, &mctl_phy->dx0dllcr); in mctl_dll_init()
84 writel(MCTL_DLLCR_NRESET, &mctl_phy->dx1dllcr); in mctl_dll_init()
86 writel(MCTL_DLLCR_NRESET, &mctl_phy->dx2dllcr); in mctl_dll_init()
87 writel(MCTL_DLLCR_NRESET, &mctl_phy->dx3dllcr); in mctl_dll_init()
118 writel(MCTL_MCMD_NOP, &mctl_ctl->mcmd); in mctl_channel_init()
122 writel(MCTL_PGCR, &mctl_phy->pgcr); in mctl_channel_init()
123 writel(MCTL_MR0, &mctl_phy->mr0); in mctl_channel_init()
124 writel(MCTL_MR1, &mctl_phy->mr1); in mctl_channel_init()
125 writel(MCTL_MR2, &mctl_phy->mr2); in mctl_channel_init()
126 writel(MCTL_MR3, &mctl_phy->mr3); in mctl_channel_init()
128 writel((MCTL_TITMSRST << 18) | (MCTL_TDLLLOCK << 6) | MCTL_TDLLSRST, in mctl_channel_init()
131 writel((MCTL_TDINIT1 << 19) | MCTL_TDINIT0, &mctl_phy->ptr1); in mctl_channel_init()
132 writel((MCTL_TDINIT3 << 17) | MCTL_TDINIT2, &mctl_phy->ptr2); in mctl_channel_init()
134 writel((MCTL_TCCD << 31) | (MCTL_TRC << 25) | (MCTL_TRRD << 21) | in mctl_channel_init()
139 writel((MCTL_TDQSCKMAX << 27) | (MCTL_TDQSCK << 24) | in mctl_channel_init()
144 writel((MCTL_TDLLK << 19) | (MCTL_TCKE << 15) | (MCTL_TXPDLL << 10) | in mctl_channel_init()
147 writel(1, &mctl_ctl->dfitphyupdtype0); in mctl_channel_init()
148 writel(MCTL_DCR_DDR3, &mctl_phy->dcr); in mctl_channel_init()
149 writel(MCTL_DSGCR, &mctl_phy->dsgcr); in mctl_channel_init()
150 writel(MCTL_DXCCR, &mctl_phy->dxccr); in mctl_channel_init()
151 writel(MCTL_DX_GCR | MCTL_DX_GCR_EN, &mctl_phy->dx0gcr); in mctl_channel_init()
152 writel(MCTL_DX_GCR | MCTL_DX_GCR_EN, &mctl_phy->dx1gcr); in mctl_channel_init()
153 writel(MCTL_DX_GCR | MCTL_DX_GCR_EN, &mctl_phy->dx2gcr); in mctl_channel_init()
154 writel(MCTL_DX_GCR | MCTL_DX_GCR_EN, &mctl_phy->dx3gcr); in mctl_channel_init()
158 writel(CONFIG_DRAM_ZQ, &mctl_phy->zq0cr1); in mctl_channel_init()
161 writel(MCTL_PIR_STEP1, &mctl_phy->pir); in mctl_channel_init()
192 writel(MCTL_PIR_STEP2, &mctl_phy->pir); in mctl_channel_init()
200 writel(MCTL_SCTL_CONFIG, &mctl_ctl->sctl); in mctl_channel_init()
204 writel(DRAM_CLK / 1000000, &mctl_ctl->togcnt1u); in mctl_channel_init()
206 writel(DRAM_CLK / 10000000, &mctl_ctl->togcnt100n); in mctl_channel_init()
208 writel(MCTL_TREFI, &mctl_ctl->trefi); in mctl_channel_init()
209 writel(MCTL_TMRD, &mctl_ctl->tmrd); in mctl_channel_init()
210 writel(MCTL_TRFC, &mctl_ctl->trfc); in mctl_channel_init()
211 writel((MCTL_TPREA << 16) | MCTL_TRP, &mctl_ctl->trp); in mctl_channel_init()
212 writel(MCTL_TRTW, &mctl_ctl->trtw); in mctl_channel_init()
213 writel(MCTL_TAL, &mctl_ctl->tal); in mctl_channel_init()
214 writel(MCTL_TCL, &mctl_ctl->tcl); in mctl_channel_init()
215 writel(MCTL_TCWL, &mctl_ctl->tcwl); in mctl_channel_init()
216 writel(MCTL_TRAS, &mctl_ctl->tras); in mctl_channel_init()
217 writel(MCTL_TRC, &mctl_ctl->trc); in mctl_channel_init()
218 writel(MCTL_TRCD, &mctl_ctl->trcd); in mctl_channel_init()
219 writel(MCTL_TRRD, &mctl_ctl->trrd); in mctl_channel_init()
220 writel(MCTL_TRTP, &mctl_ctl->trtp); in mctl_channel_init()
221 writel(MCTL_TWR, &mctl_ctl->twr); in mctl_channel_init()
222 writel(MCTL_TWTR, &mctl_ctl->twtr); in mctl_channel_init()
223 writel(MCTL_TEXSR, &mctl_ctl->texsr); in mctl_channel_init()
224 writel(MCTL_TXP, &mctl_ctl->txp); in mctl_channel_init()
225 writel(MCTL_TXPDLL, &mctl_ctl->txpdll); in mctl_channel_init()
226 writel(MCTL_TZQCS, &mctl_ctl->tzqcs); in mctl_channel_init()
227 writel(MCTL_TZQCSI, &mctl_ctl->tzqcsi); in mctl_channel_init()
228 writel(MCTL_TDQS, &mctl_ctl->tdqs); in mctl_channel_init()
229 writel(MCTL_TCKSRE, &mctl_ctl->tcksre); in mctl_channel_init()
230 writel(MCTL_TCKSRX, &mctl_ctl->tcksrx); in mctl_channel_init()
231 writel(MCTL_TCKE, &mctl_ctl->tcke); in mctl_channel_init()
232 writel(MCTL_TMOD, &mctl_ctl->tmod); in mctl_channel_init()
233 writel(MCTL_TRSTL, &mctl_ctl->trstl); in mctl_channel_init()
234 writel(MCTL_TZQCL, &mctl_ctl->tzqcl); in mctl_channel_init()
235 writel(MCTL_TMRR, &mctl_ctl->tmrr); in mctl_channel_init()
236 writel(MCTL_TCKESR, &mctl_ctl->tckesr); in mctl_channel_init()
237 writel(MCTL_TDPD, &mctl_ctl->tdpd); in mctl_channel_init()
248 writel(MCTL_TCWL, &mctl_ctl->dfitphywrl); in mctl_channel_init()
249 writel(MCTL_TCL - 1, &mctl_ctl->dfitrdden); in mctl_channel_init()
250 writel(MCTL_DFITPHYRDL, &mctl_ctl->dfitphyrdl); in mctl_channel_init()
251 writel(MCTL_DFISTCFG0, &mctl_ctl->dfistcfg0); in mctl_channel_init()
253 writel(MCTL_MCFG_DDR3, &mctl_ctl->mcfg); in mctl_channel_init()
256 writel(MCTL_DFIUPDCFG_UPD, &mctl_ctl->dfiupdcfg); in mctl_channel_init()
259 writel(MCTL_SCTL_ACCESS, &mctl_ctl->sctl); in mctl_channel_init()
272 writel(MCTL_CR_UNKNOWN | MCTL_CR_CHANNEL(para->chan) | MCTL_CR_DDR3 | in mctl_com_init()
305 writel(0x00400302, &mctl_com->rmcr[0]); in mctl_port_cfg()
306 writel(0x01000307, &mctl_com->rmcr[1]); in mctl_port_cfg()
307 writel(0x00400302, &mctl_com->rmcr[2]); in mctl_port_cfg()
308 writel(0x01000307, &mctl_com->rmcr[3]); in mctl_port_cfg()
309 writel(0x01000307, &mctl_com->rmcr[4]); in mctl_port_cfg()
310 writel(0x01000303, &mctl_com->rmcr[6]); in mctl_port_cfg()
311 writel(0x01000303, &mctl_com->mmcr[0]); in mctl_port_cfg()
312 writel(0x00400310, &mctl_com->mmcr[1]); in mctl_port_cfg()
313 writel(0x01000307, &mctl_com->mmcr[2]); in mctl_port_cfg()
314 writel(0x01000303, &mctl_com->mmcr[3]); in mctl_port_cfg()
315 writel(0x01800303, &mctl_com->mmcr[4]); in mctl_port_cfg()
316 writel(0x01800303, &mctl_com->mmcr[5]); in mctl_port_cfg()
317 writel(0x01800303, &mctl_com->mmcr[6]); in mctl_port_cfg()
318 writel(0x01800303, &mctl_com->mmcr[7]); in mctl_port_cfg()
319 writel(0x01000303, &mctl_com->mmcr[8]); in mctl_port_cfg()
320 writel(0x00000002, &mctl_com->mmcr[15]); in mctl_port_cfg()
321 writel(0x00000310, &mctl_com->mbagcr[0]); in mctl_port_cfg()
322 writel(0x00400310, &mctl_com->mbagcr[1]); in mctl_port_cfg()
323 writel(0x00400310, &mctl_com->mbagcr[2]); in mctl_port_cfg()
324 writel(0x00000307, &mctl_com->mbagcr[3]); in mctl_port_cfg()
325 writel(0x00000317, &mctl_com->mbagcr[4]); in mctl_port_cfg()
326 writel(0x00000307, &mctl_com->mbagcr[5]); in mctl_port_cfg()