4  * SPDX-License-Identifier:	GPL-2.0+
36 	writel(SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW,	&freeze_controller_base->src);  in sys_mgr_frzctrl_freeze_req()
41 			&freeze_controller_base->vioctrl + channel_id);  in sys_mgr_frzctrl_freeze_req()
44 		 * Assert active low enrnsl, plniotri  in sys_mgr_frzctrl_freeze_req()
55 		 * Assert active low bhniotri signal and de-assert  in sys_mgr_frzctrl_freeze_req()
56 		 * active high csrdone  in sys_mgr_frzctrl_freeze_req()
69 	 * Assert active low enrnsl, plniotri and  in sys_mgr_frzctrl_freeze_req()
76 	clrbits_le32(&freeze_controller_base->hioctrl, reg_cfg_mask);  in sys_mgr_frzctrl_freeze_req()
79 	 * assert active low bhniotri & nfrzdrv signals,  in sys_mgr_frzctrl_freeze_req()
80 	 * de-assert active high csrdone and assert  in sys_mgr_frzctrl_freeze_req()
81 	 * active high frzreg and nfrzdrv signals  in sys_mgr_frzctrl_freeze_req()
83 	reg_value = readl(&freeze_controller_base->hioctrl);  in sys_mgr_frzctrl_freeze_req()
91 	writel(reg_value, &freeze_controller_base->hioctrl);  in sys_mgr_frzctrl_freeze_req()
94 	 * assert active high reinit signal and de-assert  in sys_mgr_frzctrl_freeze_req()
95 	 * active high pllbiasen signals  in sys_mgr_frzctrl_freeze_req()
97 	reg_value = readl(&freeze_controller_base->hioctrl);  in sys_mgr_frzctrl_freeze_req()
102 	writel(reg_value, &freeze_controller_base->hioctrl);  in sys_mgr_frzctrl_freeze_req()
118 	writel(SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW,	&freeze_controller_base->src);  in sys_mgr_frzctrl_thaw_req()
123 			= (u32)(&freeze_controller_base->vioctrl + channel_id);  in sys_mgr_frzctrl_thaw_req()
126 		 * Assert active low bhniotri signal and  in sys_mgr_frzctrl_thaw_req()
127 		 * de-assert active high csrdone  in sys_mgr_frzctrl_thaw_req()
136 		 * de-assert active low plniotri and niotri signals  in sys_mgr_frzctrl_thaw_req()
145 		 * de-assert active low enrnsl signal  in sys_mgr_frzctrl_thaw_req()
155 	/* de-assert active high reinit signal */  in sys_mgr_frzctrl_thaw_req()
156 	clrbits_le32(&freeze_controller_base->hioctrl,  in sys_mgr_frzctrl_thaw_req()
161 	 * assert active high pllbiasen signals  in sys_mgr_frzctrl_thaw_req()
163 	setbits_le32(&freeze_controller_base->hioctrl,  in sys_mgr_frzctrl_thaw_req()
171 	 * de-assert active low bhniotri signals,  in sys_mgr_frzctrl_thaw_req()
172 	 * assert active high csrdone and nfrzdrv signal  in sys_mgr_frzctrl_thaw_req()
174 	reg_value = readl(&freeze_controller_base->hioctrl);  in sys_mgr_frzctrl_thaw_req()
179 	writel(reg_value, &freeze_controller_base->hioctrl);  in sys_mgr_frzctrl_thaw_req()
188 	/* de-assert active low plniotri and niotri signals */  in sys_mgr_frzctrl_thaw_req()
193 	setbits_le32(&freeze_controller_base->hioctrl, reg_cfg_mask);  in sys_mgr_frzctrl_thaw_req()
197 	 * de-assert active high frzreg signal  in sys_mgr_frzctrl_thaw_req()
199 	clrbits_le32(&freeze_controller_base->hioctrl,  in sys_mgr_frzctrl_thaw_req()
204 	 * de-assert active low enrnsl signal  in sys_mgr_frzctrl_thaw_req()
206 	setbits_le32(&freeze_controller_base->hioctrl,  in sys_mgr_frzctrl_thaw_req()