Lines Matching refs:GRF_BASE

22 #define GRF_BASE		0xfdc60000  macro
530 static struct rk3568_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
555 static struct rk3568_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
581 static struct rk3568_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
606 static struct rk3568_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
631 static struct rk3568_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
656 static struct rk3568_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
681 static struct rk3568_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
717 static struct rk3568_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
742 static struct rk3568_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
788 writel((0xffff0000) | (entry_point >> 16), GRF_BASE + GRF_SOC_CON4); in fit_standalone_release()
858 writel(0x3f3f0707, GRF_BASE + GRF_GPIO1B_DS_2); in arch_cpu_init()
859 writel(0x3f3f0707, GRF_BASE + GRF_GPIO1B_DS_3); in arch_cpu_init()
860 writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_0); in arch_cpu_init()
861 writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_1); in arch_cpu_init()
862 writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_2); in arch_cpu_init()
863 writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_3); in arch_cpu_init()
874 writel(0x3f000700, GRF_BASE + GRF_GPIO1C_DS_3); in arch_cpu_init()
875 writel(0x3f000700, GRF_BASE + GRF_GPIO1D_DS_0); in arch_cpu_init()
876 writel(0x3f3f0707, GRF_BASE + GRF_GPIO1D_DS_1); in arch_cpu_init()
877 writel(0x003f0007, GRF_BASE + GRF_GPIO1D_DS_2); in arch_cpu_init()
920 writel(0x3f3f0707, GRF_BASE + GRF_GPIO1B_DS_2); in arch_cpu_init()
921 writel(0x3f3f0707, GRF_BASE + GRF_GPIO1B_DS_3); in arch_cpu_init()
922 writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_0); in arch_cpu_init()
923 writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_1); in arch_cpu_init()
924 writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_2); in arch_cpu_init()
925 writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_3); in arch_cpu_init()
928 writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1B_IOMUX_H); in arch_cpu_init()
929 writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1C_IOMUX_L); in arch_cpu_init()
930 writel((0x7777UL << 16) | (0x2111), GRF_BASE + GRF_GPIO1C_IOMUX_H); in arch_cpu_init()
931 writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1D_IOMUX_L); in arch_cpu_init()
932 writel(((7 << 0) << 16) | (1 << 0), GRF_BASE + GRF_GPIO1D_IOMUX_H); in arch_cpu_init()
939 writel((0x70002000), GRF_BASE + GRF_GPIO1C_IOMUX_H); in arch_cpu_init()
940 writel((0x77771111), GRF_BASE + GRF_GPIO1D_IOMUX_L); in arch_cpu_init()
941 writel((0x00070001), GRF_BASE + GRF_GPIO1D_IOMUX_H); in arch_cpu_init()
943 writel((0x77771111), GRF_BASE + GRF_GPIO1B_IOMUX_H); in arch_cpu_init()
944 writel((0x77771111), GRF_BASE + GRF_GPIO1C_IOMUX_L); in arch_cpu_init()
945 writel((0x07770111), GRF_BASE + GRF_GPIO1C_IOMUX_H); in arch_cpu_init()
959 writel((0xffff0000) | (entry_point >> 16), GRF_BASE + GRF_SOC_CON4); in spl_fit_standalone_release()
1062 struct rk3568_grf *grf = (void *)GRF_BASE; in rk3568_board_fdt_fixup_ethernet()