Lines Matching +full:rk3288 +full:- +full:vop
4 * SPDX-License-Identifier: GPL-2.0+
23 #include <dt-bindings/clock/rk3288-cru.h>
75 rk_setreg(&grf->soc_con2, 1 << 0); in arch_cpu_init()
78 rk_setreg(&grf->soc_con7, 1 << 15); in arch_cpu_init()
87 /* Set vop qos to highest priority */ in arch_cpu_init()
99 rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT | in board_debug_uart_init()
178 /* set vop qos to higher priority */ in rk3288_qos_init()
182 if (!fdt_node_check_compatible(gd->fdt_blob, 0, in rk3288_qos_init()
183 "rockchip,rk3288-tinker")) in rk3288_qos_init()
201 switch (cru->cru_glb_rst_st) { in rk3288_detect_reset_reason()
227 rk_clrreg(&cru->cru_glb_rst_st, GLB_RST_ST_MASK); in rk3288_detect_reset_reason()
282 if (!fdt_node_check_compatible(gd->fdt_blob, 0, "google,veyron")) { in rk_board_init()
315 printf("clk-uclass not found\n"); in do_clock()
352 * This init is done in SPL, but when chain-loading U-Boot SPL will in board_early_init_f()
381 /* RK3288: Recognize RK3288W by HDMI Revision ID is 0x1A; */ in rk_board_fdt_fixup()