Lines Matching +full:0 +full:xe6060000
64 PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
79 PINMUX_RESERVED = 0,
866 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
900 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
901 0, 0,
902 0, 0,
903 0, 0,
904 0, 0,
905 0, 0,
906 0, 0,
934 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
968 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
1002 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
1036 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
1037 0, 0,
1038 0, 0,
1039 0, 0,
1040 0, 0,
1070 { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) {
1071 0, 0,
1072 0, 0,
1073 0, 0,
1074 0, 0,
1075 0, 0,
1076 0, 0,
1104 { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060020, 32,
1108 FN_D5, FN_SCIF4_RXD_B, FN_I2C0_SCL_D, 0,
1110 FN_D4, FN_I2C3_SDA_B, FN_SCIF5_TXD_B, 0,
1112 FN_D3, FN_I2C3_SCL_B, FN_SCIF5_RXD_B, 0,
1118 FN_D0, FN_SCIFA3_SCK_B, FN_IRQ4, 0,
1140 FN_SD1_WP, FN_IRQ7, FN_CAN0_TX, 0,
1142 0, 0,
1144 0, 0,
1146 0, 0,
1148 0, 0,
1150 0, 0,
1152 0, 0,
1154 0, 0,
1163 { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32,
1168 FN_AVB_TX_CLK, FN_ADIDATA, FN_AD_DI, 0,
1171 FN_AUDIO_CLKOUT_B, FN_AVB_TX_EN, 0, 0, 0,
1174 FN_AVB_COL, 0, 0, 0,
1177 FN_AVB_RX_ER, 0, 0, 0,
1180 FN_AVB_RXD7, 0, 0, 0,
1200 FN_DU0_CDE, FN_QPOLB, FN_CC50_STATE31, 0,
1202 FN_DU0_DISP, FN_QPOLA, FN_CC50_STATE30, 0,
1206 FN_DU0_EXVSYNC_DU0_VSYNC, FN_QSTB_QHE, FN_CC50_STATE28, 0, }
1208 { PINMUX_CFG_REG_VAR("IPSR7", 0xE606003C, 32,
1213 0, 0,
1216 FN_AVB_GTX_CLK, FN_SSI_WS6_B, 0, 0,
1219 FN_SSI_SCK6_B, 0, 0, 0,
1222 FN_AVB_TXD7, FN_SSI_SDATA5_B, 0, 0,
1225 FN_AVB_TXD6, FN_SSI_WS5_B, 0, 0,
1228 FN_SSI_SCK5_B, 0, 0, 0,
1231 FN_AVB_TXD4, FN_ADICHS2, 0, 0,
1234 FN_AVB_TXD3, FN_ADICHS1, 0, 0,
1237 FN_AVB_TXD2, FN_ADICHS0, FN_AD_NCS_N, 0,
1240 FN_AVB_TXD1, FN_ADICLK, FN_AD_CLK, 0,
1243 FN_AVB_TXD0, FN_ADICS_SAMP, FN_AD_DO, 0, }
1245 { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060040, 32,
1252 FN_RIF1_CLK_B, FN_TS_SCK_D, FN_BPFCLK_C, 0,
1255 FN_RIF1_SYNC_B, FN_TS_SDATA_D, FN_TPUTO1_B, 0,
1258 FN_DVC_MUTE, FN_CAN1_TX_D, 0, 0,
1261 FN_AVB_GTXREFCLK, FN_CAN1_RX_D, FN_TPUTO0_B, 0,
1266 FN_AVB_PHY_INT, FN_SSI_SDATA8_B, 0, 0,
1269 FN_AVB_MAGIC, FN_SSI_SDATA7_B, 0, 0,
1272 FN_AVB_LINK, FN_SSI_WS78_B, 0, 0,
1275 FN_AVB_MDIO, FN_SSI_SCK78_B, 0, 0,
1278 FN_AVB_MDC, FN_SSI_SDATA6_B, 0, 0, }
1285 { PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32,
1288 0, 0, 0, 0,
1291 FN_AD_CLK_B, 0, 0, 0,
1294 FN_AD_DO_B, 0, 0, 0,
1297 FN_AD_DI_B, FN_PCMWE_N, 0, 0,
1300 FN_CAN_CLK_D, FN_PCMOE_N, 0, 0,
1307 FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_CAN_DEBUGOUT15, 0, 0, 0,
1310 FN_DU1_EXVSYNC_DU1_VSYNC, FN_CAN_DEBUGOUT14, 0, 0, 0,
1316 FN_CAN_DEBUGOUT12, 0, 0, 0,
1319 FN_CAN_DEBUGOUT11, 0, 0, 0, }
1326 { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32,
1337 FN_SEL_DARC_4, 0, 0, 0,
1352 FN_SEL_I2C00_4, 0, 0, 0,
1355 FN_SEL_I2C01_4, 0, 0, 0,
1358 FN_SEL_I2C02_4, 0, 0, 0,
1361 FN_SEL_I2C03_4, 0, 0, 0,
1364 FN_SEL_I2C04_4, 0, 0, 0,
1370 { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32,
1374 FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0,
1393 FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, 0,
1421 { PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32,
1427 FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, 0,
1429 FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, 0,
1434 FN_SEL_SCIF4_4, 0, 0, 0,
1454 0, 0,
1456 0, 0,
1458 0, 0,
1460 0, 0,
1462 0, 0,
1464 0, 0,
1466 0, 0,
1468 0, 0,
1470 0, 0,
1472 0, 0,
1474 0, 0,
1476 0, 0, }
1478 { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { GP_INOUTSEL(0) } },
1479 { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
1480 0, 0,
1481 0, 0,
1482 0, 0,
1483 0, 0,
1484 0, 0,
1485 0, 0,
1513 { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) { GP_INOUTSEL(2) } },
1514 { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { GP_INOUTSEL(3) } },
1515 { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { GP_INOUTSEL(4) } },
1516 { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) {
1517 0, 0,
1518 0, 0,
1519 0, 0,
1520 0, 0,
1550 { PINMUX_CFG_REG("INOUTSEL6", 0xE6055404, 32, 1) {
1551 0, 0,
1552 0, 0,
1553 0, 0,
1554 0, 0,
1555 0, 0,
1556 0, 0,
1588 { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) { GP_INDT(0) } },
1589 { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
1590 0, 0, 0, 0,
1591 0, 0, GP_1_25_DATA, GP_1_24_DATA,
1599 { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) { GP_INDT(2) } },
1600 { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) { GP_INDT(3) } },
1601 { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) { GP_INDT(4) } },
1602 { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) {
1603 0, 0, 0, 0,
1612 { PINMUX_DATA_REG("INDT6", 0xE6055408, 32) {
1613 0, 0, 0, 0,
1614 0, 0, GP_6_25_DATA, GP_6_24_DATA,
1628 .unlock_reg = 0xe6060000, /* PMMR */