370 void __weak omap3_set_aux_cr_secure(u32 acr)  in omap3_set_aux_cr_secure()  argument
375 	emu_romcode_params.param1 = acr;  in omap3_set_aux_cr_secure()
390 void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,  in v7_arch_cp15_set_acr()  argument
395 		omap_smc1(OMAP3_GP_ROMCODE_API_WRITE_ACR, acr);  in v7_arch_cp15_set_acr()
397 		omap3_set_aux_cr_secure(acr);  in v7_arch_cp15_set_acr()
400 	asm volatile ("mcr p15, 0, %0, c1, c0, 1" : : "r" (acr));  in v7_arch_cp15_set_acr()
407 	u32 acr;  in omap3_update_aux_cr()  local
410 	asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));  in omap3_update_aux_cr()
411 	acr &= ~clear_bits;  in omap3_update_aux_cr()
412 	acr |= set_bits;  in omap3_update_aux_cr()
413 	v7_arch_cp15_set_acr(acr, 0, 0, 0, 0);  in omap3_update_aux_cr()