24 	.cm_clkmode_dpll	= CM_WKUP + 0x560,
25 	.cm_idlest_dpll		= CM_WKUP + 0x564,
26 	.cm_clksel_dpll		= CM_WKUP + 0x56c,
27 	.cm_div_m2_dpll		= CM_WKUP + 0x570,
31 	.cm_clkmode_dpll	= CM_WKUP + 0x520,
32 	.cm_idlest_dpll		= CM_WKUP + 0x524,
33 	.cm_clksel_dpll		= CM_WKUP + 0x52C,
34 	.cm_div_m4_dpll		= CM_WKUP + 0x538,
35 	.cm_div_m5_dpll		= CM_WKUP + 0x53C,
36 	.cm_div_m6_dpll		= CM_WKUP + 0x540,
40 	.cm_clkmode_dpll	= CM_WKUP + 0x5E0,
41 	.cm_idlest_dpll		= CM_WKUP + 0x5E4,
42 	.cm_clksel_dpll		= CM_WKUP + 0x5EC,
43 	.cm_div_m2_dpll		= CM_WKUP + 0x5F0,
47 	.cm_clkmode_dpll	= CM_WKUP + 0x5A0,
48 	.cm_idlest_dpll		= CM_WKUP + 0x5A4,
49 	.cm_clksel_dpll		= CM_WKUP + 0x5AC,
50 	.cm_div_m2_dpll		= CM_WKUP + 0x5B0,
51 	.cm_div_m4_dpll		= CM_WKUP + 0x5B8,
85 		0  in enable_basic_clocks()
115 		0  in enable_basic_clocks()
121 	writel(0x1, &cmdpll->clktimer2clk);  in enable_basic_clocks()
124 	writel(0x4, &cmdpll->clkselmacclk);  in enable_basic_clocks()
131 		0  in enable_edma3_clocks()
137 		0  in enable_edma3_clocks()
148 		0  in disable_edma3_clocks()
154 		0  in disable_edma3_clocks()
166 	u32 *usbclkctrl = 0;  in enable_usb_clocks()
167 	u32 *usbphyocp2scpclkctrl = 0;  in enable_usb_clocks()
169 	if (index == 0) {  in enable_usb_clocks()
186 		0  in enable_usb_clocks()
192 		0  in enable_usb_clocks()
200 	u32 *usbclkctrl = 0;  in disable_usb_clocks()
201 	u32 *usbphyocp2scpclkctrl = 0;  in disable_usb_clocks()
203 	if (index == 0) {  in disable_usb_clocks()
220 		0  in disable_usb_clocks()
226 		0  in disable_usb_clocks()