Lines Matching +full:50 +full:mhz
61 { /* 19.2 MHz */
62 {125, 3, 2, -1, -1, -1, -1}, /* OPP 50 */
69 { /* 24 MHz */
70 {25, 0, 2, -1, -1, -1, -1}, /* OPP 50 */
77 { /* 25 MHz */
78 {24, 0, 2, -1, -1, -1, -1}, /* OPP 50 */
85 { /* 26 MHz */
86 {300, 12, 2, -1, -1, -1, -1}, /* OPP 50 */
96 {625, 11, -1, -1, 10, 8, 4}, /* 19.2 MHz */
97 {125, 2, -1, -1, 10, 8, 4}, /* 24 MHz */
98 {40, 0, -1, -1, 10, 8, 4}, /* 25 MHz */
99 {500, 12, -1, -1, 10, 8, 4} /* 26 MHz */
103 {400, 7, 5, -1, -1, -1, -1}, /* 19.2 MHz */
104 {400, 9, 5, -1, -1, -1, -1}, /* 24 MHz */
105 {384, 9, 5, -1, -1, -1, -1}, /* 25 MHz */
106 {480, 12, 5, -1, -1, -1, -1} /* 26 MHz */
111 {101, 3, 2, -1, -1, -1, -1}, /* 24 MHz */
112 {303, 24, 1, -1, 4, -1, -1}, /* 25 MHz */
113 {303, 12, 2, -1, 4, -1, -1} /* 26 MHz */
118 {50, 2, 1, -1, -1, -1, -1}, /* 24 MHz */
119 {16, 0, 1, -1, 4, -1, -1}, /* 25 MHz */
120 {200, 12, 1, -1, 4, -1, -1} /* 26 MHz */
125 {133, 11, 1, -1, -1, -1, -1}, /* 24 MHz */
126 {266, 24, 1, -1, 4, -1, -1}, /* 25 MHz */
127 {133, 12, 1, -1, 4, -1, -1} /* 26 MHz */
228 /* Select the Master osc 24 MHZ as Timer2 clock source */ in enable_basic_clocks()