Lines Matching +full:0 +full:x02004000

16 #define KS2_PASS_BASE			0x02000000
19 #define KS2_LPSC_MOD			0
74 #define KS2_DDR3B_EMIF_CTRL_BASE	0x21020000
75 #define KS2_DDR3B_EMIF_DATA_BASE	0x60000000
76 #define KS2_DDR3B_DDRPHYC		0x02328000
78 #define KS2_CIC2_DDR3_ECC_IRQ_NUM	0x0D3 /* DDR3 ECC system irq number */
79 #define KS2_CIC2_DDR3_ECC_CHAN_NUM	0x01D /* DDR3 ECC int mapped to CIC2
89 #define KS2_NETCP_PDMA_CTRL_BASE	0x02004000
90 #define KS2_NETCP_PDMA_TX_BASE		0x02004400
92 #define KS2_NETCP_PDMA_RX_BASE		0x02004800
94 #define KS2_NETCP_PDMA_SCHED_BASE	0x02004c00
95 #define KS2_NETCP_PDMA_RX_FLOW_BASE	0x02005000
100 #define KS2_NETCP_BASE			0x02000000