Lines Matching +full:0 +full:x328
16 #define KS2_LPSC_ALWAYSON 0
58 #define KS2_NETCP_PDMA_CTRL_BASE 0x04010000
59 #define KS2_NETCP_PDMA_TX_BASE 0x04011000
61 #define KS2_NETCP_PDMA_RX_BASE 0x04012000
63 #define KS2_NETCP_PDMA_SCHED_BASE 0x04010100
64 #define KS2_NETCP_PDMA_RX_FLOW_BASE 0x04013000
69 #define KS2_NETCP_BASE 0x04000000
71 #define K2G_GPIO0_BASE 0X02603000
72 #define K2G_GPIO1_BASE 0X0260a000
73 #define K2G_GPIO1_BANK2_BASE K2G_GPIO1_BASE + 0x38
74 #define K2G_GPIO_DIR_OFFSET 0x0
75 #define K2G_GPIO_SETDATA_OFFSET 0x8
78 #define KS2_RSTMUX8 (KS2_DEVICE_STATE_CTRL_BASE + 0x328)
81 #define RSTMUX_LOCK8_SHIFT 0x0
82 #define RSTMUX_LOCK8_MASK (0x1 << 0)
83 #define RSTMUX_OMODE8_SHIFT 0x1
84 #define RSTMUX_OMODE8_MASK (0x7 << 1)
85 #define RSTMUX_OMODE8_DEV_RESET 0x2
86 #define RSTMUX_OMODE8_INT 0x3
87 #define RSTMUX_OMODE8_INT_AND_DEV_RESET 0x4
91 #define KS2_DEVSTAT_REFCLK_MASK (0x7 << 7)
94 #define KS2_GPMC_BASE 0x21818000
97 #define SYSCLK_19MHz 0