Lines Matching +full:1000 +full:mhz
152 /* 158MHz / 1 = 158MHz */ in init_clk_usdhc()
161 /* 158MHz / 1 = 158MHz */ in init_clk_usdhc()
283 * A4 side: SIRC 16Mhz (DIV1-3 off), FIRC 48Mhz (DIV1-2 on), in clock_init()
285 * A7 side: SPLL PFD0 (scs selected, 413Mhz), in clock_init()
286 * APLL PFD0 (352Mhz), DDRCLK, all NIC clocks in clock_init()
287 * A7 Plat0 (NIC0) = 176Mhz, Plat1 (NIC1) = 176Mhz, in clock_init()
288 * IP BUS (NIC1_BUS) = 58.6Mhz in clock_init()
304 /* APLL PFD1 = 270Mhz, PFD2=480Mhz, PFD3=800Mhz */ in clock_init()
334 printf("PLL_A7_SPLL %8d MHz\n", freq / 1000000); in do_mx7_showclocks()
337 printf("PLL_A7_APLL %8d MHz\n", freq / 1000000); in do_mx7_showclocks()
340 printf("PLL_USB %8d MHz\n", freq / 1000000); in do_mx7_showclocks()
344 printf("CORE %8d kHz\n", scg_clk_get_rate(SCG_CORE_CLK) / 1000); in do_mx7_showclocks()
345 printf("IPG %8d kHz\n", mxc_get_clock(MXC_IPG_CLK) / 1000); in do_mx7_showclocks()
346 printf("UART %8d kHz\n", mxc_get_clock(MXC_UART_CLK) / 1000); in do_mx7_showclocks()
347 printf("AHB %8d kHz\n", mxc_get_clock(MXC_AHB_CLK) / 1000); in do_mx7_showclocks()
348 printf("AXI %8d kHz\n", mxc_get_clock(MXC_AXI_CLK) / 1000); in do_mx7_showclocks()
349 printf("DDR %8d kHz\n", mxc_get_clock(MXC_DDR_CLK) / 1000); in do_mx7_showclocks()
350 printf("USDHC1 %8d kHz\n", mxc_get_clock(MXC_ESDHC_CLK) / 1000); in do_mx7_showclocks()
351 printf("USDHC2 %8d kHz\n", mxc_get_clock(MXC_ESDHC2_CLK) / 1000); in do_mx7_showclocks()
352 printf("I2C4 %8d kHz\n", mxc_get_clock(MXC_I2C_CLK) / 1000); in do_mx7_showclocks()