Lines Matching refs:mpdgctrl0
23 setbits_le32(&mmdc0->mpdgctrl0, 1 << 31); in reset_read_data_fifos()
24 wait_for_bit_le32(&mmdc0->mpdgctrl0, 1 << 31, 0, 100, 0); in reset_read_data_fifos()
26 setbits_le32(&mmdc0->mpdgctrl0, 1 << 31); in reset_read_data_fifos()
27 wait_for_bit_le32(&mmdc0->mpdgctrl0, 1 << 31, 0, 100, 0); in reset_read_data_fifos()
354 setbits_le32(&mmdc0->mpdgctrl0, 1 << 30); in mmdc_do_dqs_calibration()
356 setbits_le32(&mmdc1->mpdgctrl0, 1 << 30); in mmdc_do_dqs_calibration()
359 setbits_le32(&mmdc0->mpdgctrl0, 5 << 28); in mmdc_do_dqs_calibration()
362 wait_for_bit_le32(&mmdc0->mpdgctrl0, 1 << 28, 0, 100, 0); in mmdc_do_dqs_calibration()
369 if (readl(&mmdc0->mpdgctrl0) & 0x00001000) in mmdc_do_dqs_calibration()
372 if ((sysinfo->dsize == 0x2) && (readl(&mmdc1->mpdgctrl0) & 0x00001000)) in mmdc_do_dqs_calibration()
376 clrbits_le32(&mmdc0->mpdgctrl0, 1 << 30); in mmdc_do_dqs_calibration()
378 clrbits_le32(&mmdc1->mpdgctrl0, 1 << 30); in mmdc_do_dqs_calibration()
386 &mmdc0->mpdgctrl0); in mmdc_do_dqs_calibration()
391 &mmdc1->mpdgctrl0); in mmdc_do_dqs_calibration()
537 debug("\tMPDGCTRL0 PHY0 = 0x%08X\n", readl(&mmdc0->mpdgctrl0)); in mmdc_do_dqs_calibration()
540 debug("\tMPDGCTRL0 PHY1 = 0x%08X\n", readl(&mmdc1->mpdgctrl0)); in mmdc_do_dqs_calibration()
1081 mmdc0->mpdgctrl0 = calib->p0_mpdgctrl0; in mx6_lpddr2_cfg()
1365 mmdc0->mpdgctrl0 = calib->p0_mpdgctrl0; in mx6_ddr3_cfg()
1372 MMDC1(mpdgctrl0, calib->p1_mpdgctrl0); in mx6_ddr3_cfg()
1511 calib->p0_mpdgctrl0 = readl(&mmdc0->mpdgctrl0); in mmdc_read_calibration()
1519 calib->p1_mpdgctrl0 = readl(&mmdc1->mpdgctrl0); in mmdc_read_calibration()