Lines Matching +full:0 +full:x000a0000
18 mrc 15, 0, r1, c1, c0, 1
20 mcr 15, 0, r1, c1, c0, 1
28 mrc 15, 0, r0, c1, c0, 1
29 bic r0, r0, #0x2
30 mcr 15, 0, r0, c1, c0, 1
33 ldr r0, =0xC0 | /* tag RAM */ \
34 0x4 | /* data RAM */ \
41 cmp r3, #0x10
50 mrc 15, 0, r0, c1, c0, 1
52 mcr 15, 0, r0, c1, c0, 1
64 ldr r1, =0x77777777
65 str r1, [r0, #0x0]
66 str r1, [r0, #0x4]
68 str r1, [r0, #0x0]
69 str r1, [r0, #0x4]
73 * (offset 0x20) access type
80 /* VPU and IPU given higher priority (0x4)
81 * IPU accesses with ID=0x1 given highest priority (=0xA)
85 ldr r1, =0x00000203
86 str r1, [r0, #0x40]
88 str r4, [r0, #0x44]
90 ldr r1, =0x00120125
91 str r1, [r0, #0x9C]
93 ldr r1, =0x001901A3
94 str r1, [r0, #0x48]
105 #define W_DP_OP 0
110 ldr r1, =0x00001232
112 mov r1, #0x2
127 ldr r1, =0x00001232
130 ands r1, r1, #0x1
139 ldr r1, =0x00001236
142 ands r1, r1, #0x1
149 mov r1, #0x1
160 mov r1, #0x2
169 ldr r1, =0x3FFFFFFF
175 ldr r1, =0x00030000
177 ldr r1, =0x00FFF030
179 ldr r1, =0x00000300
183 mov r1, #0x60000
187 ldr r1, =0x19239145
191 cmp r1, #0x0
195 mov r1, #0x4
209 ldr r1, =0x000010C0 | CONFIG_SYS_DDR_CLKSEL
211 ldr r1, =0x13239145
217 ldr r1, =0x19239145
219 ldr r1, =0x000020C0 | CONFIG_SYS_DDR_CLKSEL
226 ldr r1, =0x00000725
227 str r1, [r0, #0x14]
233 cmp r3, #0x10
234 movls r1, #0x1
235 movhi r1, #0
244 ldr r1, =0x000020C2 | CONFIG_SYS_DDR_CLKSEL
251 ldr r1, =0xFFFFFFFF
261 ldr r1, =0xA5A2A020
263 ldr r1, =0x00C30321
267 cmp r1, #0x0
273 mov r1, #0x000A0000
274 add r1, r1, #0x00000F0
280 ldr r1, =0x3FFFFFFF
286 ldr r1, =0x00030000
288 ldr r1, =0x00FFF030
290 ldr r1, =0x0F00030F
294 mov r1, #0x4
303 ldr r1, =0x00015154
305 ldr r1, =0x02898945
309 cmp r1, #0x0
316 ldr r1, =0x00888945
319 ldr r1, =0x00016154
324 and r1, r1, #0xfcffffff
325 orr r1, r1, #0x01000000
330 cmp r1, #0x0
339 ldr r1, =0x00000124
340 str r1, [r0, #0x14]
343 mov r1, #0
347 mov r1, #0x0
352 and r1, r1, #0xffffffc0
353 orr r1, r1, #0x0a
357 ldr r1, =0xFFFFFFFF
367 mov r1, #0x00000
371 mov r1, #0x000A0000
372 add r1, r1, #0x00000F0
380 mov r4, #0 /* Fix R4 to 0 */
384 ldr r1, [r0, #0x0]
386 str r1, [r0, #0x0]
387 ldr r1, [r0, #0x4]
389 str r1, [r0, #0x4]