Lines Matching refs:mxc_plls
29 struct mxc_pll_reg *mxc_plls[PLL_CLOCKS] = { variable
242 ret_val = decode_pll(mxc_plls[PLL4_CLOCK], MXC_HCLK); in get_lp_apm()
258 freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_mcu_main_clk()
271 return decode_pll(mxc_plls[PLL2_CLOCK], MXC_HCLK); in get_periph_clk()
275 return decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_periph_clk()
277 return decode_pll(mxc_plls[PLL3_CLOCK], MXC_HCLK); in get_periph_clk()
329 freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_standard_pll_sel_clk()
332 freq = decode_pll(mxc_plls[PLL2_CLOCK], MXC_HCLK); in get_standard_pll_sel_clk()
335 freq = decode_pll(mxc_plls[PLL3_CLOCK], MXC_HCLK); in get_standard_pll_sel_clk()
457 ret_val = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in get_ddr_clk()
649 struct mxc_pll_reg *pll = mxc_plls[index]; in config_pll_clk()
921 freq = decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK); in do_mx5_showclocks()
923 freq = decode_pll(mxc_plls[PLL2_CLOCK], MXC_HCLK); in do_mx5_showclocks()
925 freq = decode_pll(mxc_plls[PLL3_CLOCK], MXC_HCLK); in do_mx5_showclocks()
928 freq = decode_pll(mxc_plls[PLL4_CLOCK], MXC_HCLK); in do_mx5_showclocks()