74 	writel(mem->concontrol | (mem->rd_fetch << CONCONTROL_RD_FETCH_SHIFT)  in ddr3_mem_ctrl_init()
76 		&dmc->concontrol);  in ddr3_mem_ctrl_init()
105 	writel(mem->concontrol | (mem->rd_fetch << CONCONTROL_RD_FETCH_SHIFT),  in ddr3_mem_ctrl_init()
106 	       &dmc->concontrol);  in ddr3_mem_ctrl_init()
221 	writel(mem->concontrol | (mem->rd_fetch << CONCONTROL_RD_FETCH_SHIFT)  in ddr3_mem_ctrl_init()
222 		| (mem->aref_en << CONCONTROL_AREF_EN_SHIFT), &dmc->concontrol);  in ddr3_mem_ctrl_init()
549 	writel(mem->concontrol |  in ddr3_mem_ctrl_init()
552 		&drex0->concontrol);  in ddr3_mem_ctrl_init()
553 	writel(mem->concontrol |  in ddr3_mem_ctrl_init()
556 		&drex1->concontrol);  in ddr3_mem_ctrl_init()
565 	clrbits_le32(&drex0->concontrol, DFI_INIT_START);  in ddr3_mem_ctrl_init()
566 	clrbits_le32(&drex1->concontrol, DFI_INIT_START);  in ddr3_mem_ctrl_init()
828 	writel(mem->concontrol | (mem->aref_en << CONCONTROL_AREF_EN_SHIFT) |  in ddr3_mem_ctrl_init()
831 		&drex0->concontrol);  in ddr3_mem_ctrl_init()
832 	writel(mem->concontrol | (mem->aref_en << CONCONTROL_AREF_EN_SHIFT) |  in ddr3_mem_ctrl_init()
835 		&drex1->concontrol);  in ddr3_mem_ctrl_init()
857 	val = readl(&drex0->concontrol);  in ddr3_mem_ctrl_init()
859 	writel(val, &drex0->concontrol);  in ddr3_mem_ctrl_init()
860 	val = readl(&drex1->concontrol);  in ddr3_mem_ctrl_init()
862 	writel(val, &drex1->concontrol);  in ddr3_mem_ctrl_init()