Lines Matching refs:VPLL
145 } else if (pllreg == VPLL) { in exynos_get_pll_clk()
203 case VPLL: in exynos4_get_pll_clk()
233 case VPLL: in exynos4x12_get_pll_clk()
264 case VPLL: in exynos5_get_pll_clk()
322 case VPLL: in exynos542x_get_pll_clk()
444 sclk = exynos5_get_pll_clk(VPLL); in exynos5_get_periph_rate()
657 sclk = get_pll_clk(VPLL); in exynos4_get_pwm_clk()
718 sclk = get_pll_clk(VPLL); in exynos4_get_uart_clk()
764 sclk = get_pll_clk(VPLL); in exynos4x12_get_uart_clk()
800 sclk = get_pll_clk(VPLL); in exynos4_get_mmc_clk()
938 sclk = get_pll_clk(VPLL); in exynos4_get_lcd_clk()
980 sclk = get_pll_clk(VPLL); in exynos5_get_lcd_clk()