19 	      u32 ram_address)  in atmel_mpddr_op()  argument
22 	writel(0, ram_address);  in atmel_mpddr_op()
39 	      const unsigned int ram_address,  in ddr2_init()  argument
65 	atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_NOP_CMD, ram_address);  in ddr2_init()
71 	atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_NOP_CMD, ram_address);  in ddr2_init()
74 	atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_PRCGALL_CMD, ram_address);  in ddr2_init()
78 		       ram_address + (0x2 << ba_off));  in ddr2_init()
82 		       ram_address + (0x3 << ba_off));  in ddr2_init()
89 		       ram_address + (0x1 << ba_off));  in ddr2_init()
96 	atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_LMR_CMD, ram_address);  in ddr2_init()
99 	atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_PRCGALL_CMD, ram_address);  in ddr2_init()
102 	atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_RFSH_CMD, ram_address);  in ddr2_init()
103 	atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_RFSH_CMD, ram_address);  in ddr2_init()
110 	atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_LMR_CMD, ram_address);  in ddr2_init()
121 		       ram_address + (0x1 << ba_off));  in ddr2_init()
132 		       ram_address + (0x1 << ba_off));  in ddr2_init()
135 	atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_NORMAL_CMD, ram_address);  in ddr2_init()
138 	writel(0, ram_address);  in ddr2_init()
147 	      const unsigned int ram_address,  in ddr3_init()  argument
174 	atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_NOP_CMD, ram_address);  in ddr3_init()
180 	atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_NOP_CMD, ram_address);  in ddr3_init()
187 		       ram_address + (0x2 << ba_off));  in ddr3_init()
193 		       ram_address + (0x3 << ba_off));  in ddr3_init()
199 		       ram_address + (0x1 << ba_off));  in ddr3_init()
207 	atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_LMR_CMD, ram_address);  in ddr3_init()
215 	atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_DEEP_CMD, ram_address);  in ddr3_init()
218 	atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_NORMAL_CMD, ram_address);  in ddr3_init()
221 	writel(0, ram_address);  in ddr3_init()