Lines Matching +full:0 +full:xfffffe00
25 #define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
31 #define ATMEL_ID_USART0 6 /* USART 0 */
36 #define ATMEL_ID_TWI0 11 /* TWI 0 */
39 #define ATMEL_ID_SSC0 14 /* Serial Synchronous Controller 0 */
41 #define ATMEL_ID_TC0 16 /* Timer Counter 0 */
55 #define ATMEL_BASE_TCB0 0xfffa0000
56 #define ATMEL_BASE_TC0 0xfffa0000
57 #define ATMEL_BASE_TC1 0xfffa0040
58 #define ATMEL_BASE_TC2 0xfffa0080
59 #define ATMEL_BASE_MCI 0xfffa4000
60 #define ATMEL_BASE_TWI0 0xfffa8000
61 #define ATMEL_BASE_TWI1 0xfffac000
62 #define ATMEL_BASE_USART0 0xfffb0000
63 #define ATMEL_BASE_USART1 0xfffb4000
64 #define ATMEL_BASE_USART2 0xfffb8000
65 #define ATMEL_BASE_USART3 0xfffbc000
66 #define ATMEL_BASE_SSC0 0xfffc0000
67 #define ATMEL_BASE_SSC1 0xfffc4000
68 #define ATMEL_BASE_PWMC 0xfffc8000
69 #define ATMEL_BASE_SPI0 0xfffcc000
70 #define ATMEL_BASE_TSC 0xfffd0000
71 #define ATMEL_BASE_UDPHS 0xfffd4000
72 #define ATMEL_BASE_AC97C 0xfffd8000
73 #define ATMEL_BASE_SYS 0xffffc000
78 #define ATMEL_BASE_DMA 0xffffe600
79 #define ATMEL_BASE_ECC 0xffffe800
80 #define ATMEL_BASE_SDRAMC 0xffffea00
81 #define ATMEL_BASE_SMC 0xffffec00
82 #define ATMEL_BASE_MATRIX 0xffffee00
83 #define ATMEL_BASE_CCFG 0xffffef10
84 #define ATMEL_BASE_AIC 0xfffff000
85 #define ATMEL_BASE_DBGU 0xfffff200
86 #define ATMEL_BASE_PIOA 0xfffff400
87 #define ATMEL_BASE_PIOB 0xfffff600
88 #define ATMEL_BASE_PIOC 0xfffff800
89 #define ATMEL_BASE_PIOD 0xfffffa00
90 #define ATMEL_BASE_PMC 0xfffffc00
91 #define ATMEL_BASE_RSTC 0xfffffd00
92 #define ATMEL_BASE_SHDWC 0xfffffd10
93 #define ATMEL_BASE_RTT 0xfffffd20
94 #define ATMEL_BASE_PIT 0xfffffd30
95 #define ATMEL_BASE_WDT 0xfffffd40
96 #define ATMEL_BASE_SCKCR 0xfffffd50
97 #define ATMEL_BASE_GPBR 0xfffffd60
98 #define ATMEL_BASE_RTC 0xfffffe00
103 #define ATMEL_BASE_SRAM 0x00300000 /* Internal SRAM base address */
104 #define ATMEL_BASE_ROM 0x00400000 /* Internal ROM base address */
106 #define ATMEL_BASE_LCDC 0x00500000 /* LCD Controller */
107 #define ATMEL_UHP_BASE 0x00600000 /* USB Device HS controller */
112 #define ATMEL_BASE_CS0 0x10000000
113 #define ATMEL_BASE_CS1 0x20000000 /* SDRAM */
114 #define ATMEL_BASE_CS2 0x30000000
115 #define ATMEL_BASE_CS3 0x40000000 /* NAND */
116 #define ATMEL_BASE_CS4 0x50000000 /* Compact Flash Slot 0 */
117 #define ATMEL_BASE_CS5 0x60000000 /* Compact Flash Slot 1 */
120 #define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c