Lines Matching defs:pl310_regs
23 struct pl310_regs { struct
24 u32 pl310_cache_id;
25 u32 pl310_cache_type;
26 u32 pad1[62];
27 u32 pl310_ctrl;
28 u32 pl310_aux_ctrl;
29 u32 pl310_tag_latency_ctrl;
30 u32 pl310_data_latency_ctrl;
31 u32 pad2[60];
32 u32 pl310_event_cnt_ctrl;
33 u32 pl310_event_cnt1_cfg;
34 u32 pl310_event_cnt0_cfg;
35 u32 pl310_event_cnt1_val;
36 u32 pl310_event_cnt0_val;
37 u32 pl310_intr_mask;
38 u32 pl310_masked_intr_stat;
39 u32 pl310_raw_intr_stat;
40 u32 pl310_intr_clear;
41 u32 pad3[323];
42 u32 pl310_cache_sync;
43 u32 pad4[15];
44 u32 pl310_inv_line_pa;
45 u32 pad5[2];
46 u32 pl310_inv_way;
47 u32 pad6[12];
48 u32 pl310_clean_line_pa;
49 u32 pad7[1];
50 u32 pl310_clean_line_idx;
51 u32 pl310_clean_way;
52 u32 pad8[12];
53 u32 pl310_clean_inv_line_pa;
54 u32 pad9[1];
55 u32 pl310_clean_inv_line_idx;
56 u32 pl310_clean_inv_way;
57 u32 pad10[64];
58 u32 pl310_lockdown_dbase;
59 u32 pl310_lockdown_ibase;
60 u32 pad11[190];
61 u32 pl310_addr_filter_start;
62 u32 pl310_addr_filter_end;
63 u32 pad12[190];
64 u32 pl310_test_operation;
65 u32 pad13[3];
66 u32 pl310_line_data;
67 u32 pad14[7];
68 u32 pl310_line_tag;
69 u32 pad15[3];
70 u32 pl310_debug_ctrl;
71 u32 pad16[7];
72 u32 pl310_prefetch_ctrl;
73 u32 pad17[7];
74 u32 pl310_power_ctrl;