Lines Matching refs:msr

167 	msr	cptr_el3, xzr		/* Disable coprocessor traps to EL3 */
169 	msr	cptr_el2, \tmp		/* Disable coprocessor traps to EL2 */
172 	msr	cntvoff_el2, xzr
184 	msr	sctlr_el2, \tmp
187 	msr	sp_el2, \tmp		/* Migrate SP */
189 	msr	vbar_el2, \tmp		/* Migrate VBAR */
208 	msr	scr_el3, \tmp
214 	msr	spsr_el3, \tmp
215 	msr	elr_el3, \ep
226 	msr	scr_el3, \tmp
233 	msr	spsr_el3, \tmp
234 	msr     elr_el3, \ep
255 	msr	cnthctl_el2, \tmp
256 	msr	cntvoff_el2, xzr
260 	msr	vpidr_el2, \tmp
262 	msr	vmpidr_el2, \tmp
266 	msr	cptr_el2, \tmp		/* Disable coprocessor traps to EL2 */
267 	msr	hstr_el2, xzr		/* Disable coprocessor traps to EL2 */
269 	msr	cpacr_el1, \tmp		/* Enable FP/SIMD at EL1 */
287 	msr	sctlr_el1, \tmp
290 	msr	sp_el1, \tmp		/* Migrate SP */
292 	msr	vbar_el1, \tmp		/* Migrate VBAR */
300 	msr	hcr_el2, \tmp
306 	msr	spsr_el2, \tmp
307 	msr     elr_el2, \ep
313 	msr	hcr_el2, \tmp
320 	msr     spsr_el2, \tmp
321 	msr     elr_el2, \ep
329 	msr     ICC_EOIR1_EL1, \xreg1