Lines Matching +full:0 +full:x19000000
10 #define IHOST_PROC_CLK_PLLARMA 0X19000C00
11 #define IHOST_PROC_CLK_PLLARMB 0X19000C04
14 #define IHOST_PROC_CLK_WR_ACCESS 0X19000000
15 #define IHOST_PROC_CLK_POLICY_FREQ 0X19000008
20 #define IHOST_PROC_CLK_POLICY_CTL 0X1900000C
21 #define IHOST_PROC_CLK_POLICY_CTL__GO 0
23 #define IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_R 0
26 #define IHOST_PROC_CLK_POLICY_FREQ__POLICY0_FREQ_R 0
29 #define IHOST_PROC_CLK_PLLARMA__PLLARM_SOFT_RESETB 0
30 #define IHOST_PROC_CLK_CORE0_CLKGATE 0X19000200
31 #define IHOST_PROC_CLK_CORE1_CLKGATE 0X19000204
32 #define IHOST_PROC_CLK_ARM_SWITCH_CLKGATE 0X19000210
33 #define IHOST_PROC_CLK_ARM_PERIPH_CLKGATE 0X19000300
34 #define IHOST_PROC_CLK_APB0_CLKGATE 0X19000400
35 #define IPROC_CLKCT_HDELAY_SW_EN 0x00000303
37 #define IPROC_REG_WRITE_ACCESS 0x00a5a501
39 #define IPROC_PERIPH_BASE 0x19020000
40 #define IPROC_PERIPH_INT_CTRL_REG_BASE (IPROC_PERIPH_BASE + 0x100)
41 #define IPROC_PERIPH_GLB_TIM_REG_BASE (IPROC_PERIPH_BASE + 0x200)
42 #define IPROC_PERIPH_PVT_TIM_REG_BASE (IPROC_PERIPH_BASE + 0x600)
43 #define IPROC_PERIPH_INT_DISTR_REG_BASE (IPROC_PERIPH_BASE + 0x1000)
45 #define PLL_AXI_CLK 0x1DCD6500