Lines Matching +full:0 +full:x042
13 /* CMD register 0x000 ~ 0x43 */
15 /* Address 0x000 ~ 0x002 */
22 /* Address 0x008 ~ 0x00a */
29 /* Address 0x010 ~ 0x012 */
36 /* Address 0x018 ~ 0x01a */
43 /* Address 0x028 */
48 /* Address 0x030 ~ 0x033 */
56 /* Address 0x036 ~ 0x03e */
69 /* Address 0x040 ~ 0x043 */
81 /* COM register 0x300 ~ 0x329 */
83 /* Address 0x300 ~ 0x301 */
87 /* _COM_PIN_OUTPUT_ENABLE0/1/2/3_0: Address 0x302 ~ 0x305 */
90 /* _COM_PIN_OUTPUT_POLARITY0/1/2/3_0: Address 0x306 ~ 0x309 */
93 /* _COM_PIN_OUTPUT_DATA0/1/2/3_0: Address 0x30a ~ 0x30d */
96 /* _COM_PIN_INPUT_ENABLE0_0: Address 0x30e ~ 0x311 */
99 /* Address 0x312 ~ 0x313 */
103 /* _COM_PIN_OUTPUT_SELECT0/1/2/3/4/5/6_0: Address 0x314 ~ 0x31a */
106 /* Address 0x31b ~ 0x329 */
175 /* DISP register 0x400 ~ 0x4c1 */
177 /* Address 0x400 ~ 0x40a */
190 /* Address 0x40b ~ 0x419: _DISP_H_PULSE0/1/2_ */
193 /* Address 0x41a ~ 0x421 */
197 /* Address 0x422 ~ 0x425 */
201 /* Address 0x426 ~ 0x429 */
207 /* Address 0x42a ~ 0x42d: _DISP_PP_SELECT_A/B/C/D_0 */
210 /* Address 0x42e ~ 0x435 */
220 /* Address 0x436 ~ 0x439 */
228 /* Address 0x43c ~ 0x442 */
237 /* Address 0x443 ~ 0x446 */
243 uint reserved1[0x39]; /* reserved1[0x39], */
245 /* Address 0x480 ~ 0x484 */
252 uint reserved2[0x3b]; /* reserved2[0x3b] */
254 /* Address 0x4c0 ~ 0x4c1 */
260 /* Address 0x4e4 */
265 WINC_FILTER_COUNT = 0x10,
268 /* Window A/B/C register 0x500 ~ 0x628 */
271 /* Address 0x500 */
274 uint reserved0[0xff]; /* reserved_0[0xff] */
276 /* Address 0x600 */
279 /* _WINC_H_FILTER_P00~0F_0 */
280 /* Address 0x601 ~ 0x610 */
283 /* Address 0x611 ~ 0x618 */
293 /* Address 0x619 ~ 0x628: _WINC_V_FILTER_P00~0F_0 */
297 /* WIN A/B/C Register 0x700 ~ 0x719*/
299 /* Address 0x700 ~ 0x719 */
328 /* WINBUF A/B/C Register 0x800 ~ 0x80d */
330 /* Address 0x800 ~ 0x80d */
349 struct dc_cmd_reg cmd; /* CMD register 0x000 ~ 0x43 */
350 uint reserved0[0x2bc];
352 struct dc_com_reg com; /* COM register 0x300 ~ 0x329 */
353 uint reserved1[0xd6];
355 struct dc_disp_reg disp; /* DISP register 0x400 ~ 0x4e4 */
356 uint reserved2[0x1b];
358 struct dc_winc_reg winc; /* Window A/B/C 0x500 ~ 0x628 */
359 uint reserved3[0xd7];
361 struct dc_win_reg win; /* WIN A/B/C 0x700 ~ 0x719*/
362 uint reserved4[0xe6];
364 struct dc_winbuf_reg winbuf; /* WINBUF A/B/C 0x800 ~ 0x80d */
367 /* DC_CMD_DISPLAY_COMMAND 0x032 */
369 #define CTRL_MODE_MASK (0x3 << CTRL_MODE_SHIFT)
402 /* DC_CMD_DISPLAY_POWER_CONTROL 0x036 */
403 #define PW0_ENABLE BIT(0)
413 /* DC_CMD_STATE_ACCESS 0x040 */
414 #define READ_MUX_ASSEMBLY (0 << 0)
415 #define READ_MUX_ACTIVE (1 << 0)
416 #define WRITE_MUX_ASSEMBLY (0 << 2)
419 /* DC_CMD_STATE_CONTROL 0x041 */
420 #define GENERAL_ACT_REQ BIT(0)
436 /* DC_CMD_DISPLAY_WINDOW_HEADER 0x042 */
443 /* DC_DISP_DISP_WIN_OPTIONS 0x402 */
450 /* DC_DISP_DISP_TIMING_OPTIONS 0x405 */
451 #define VSYNC_H_POSITION(x) ((x) & 0xfff)
453 /* DC_DISP_DISP_CLOCK_CONTROL 0x42e */
454 #define SHIFT_CLK_DIVIDER_SHIFT 0
455 #define SHIFT_CLK_DIVIDER_MASK (0xff << SHIFT_CLK_DIVIDER_SHIFT)
457 #define PIXEL_CLK_DIVIDER_MSK (0xf << PIXEL_CLK_DIVIDER_SHIFT)
474 /* DC_DISP_DISP_INTERFACE_CONTROL 0x42f */
475 #define DATA_FORMAT_SHIFT 0
476 #define DATA_FORMAT_MASK (0xf << DATA_FORMAT_SHIFT)
499 /* DC_DISP_DATA_ENABLE_OPTIONS 0x432 */
500 #define DE_SELECT_SHIFT 0
501 #define DE_SELECT_MASK (0x3 << DE_SELECT_SHIFT)
502 #define DE_SELECT_ACTIVE_BLANK 0x0
503 #define DE_SELECT_ACTIVE 0x1
504 #define DE_SELECT_ACTIVE_IS 0x2
506 #define DE_CONTROL_MASK (0x7 << DE_CONTROL_SHIFT)
515 /* DC_WIN_WIN_OPTIONS 0x700 */
516 #define H_DIRECTION BIT(0)
531 /* DC_WIN_BYTE_SWAP 0x701 */
532 #define BYTE_SWAP_SHIFT 0
541 /* DC_WIN_POSITION 0x704 */
542 #define H_POSITION_SHIFT 0
543 #define H_POSITION_MASK (0x1FFF << H_POSITION_SHIFT)
545 #define V_POSITION_MASK (0x1FFF << V_POSITION_SHIFT)
547 /* DC_WIN_SIZE 0x705 */
548 #define H_SIZE_SHIFT 0
549 #define H_SIZE_MASK (0x1FFF << H_SIZE_SHIFT)
551 #define V_SIZE_MASK (0x1FFF << V_SIZE_SHIFT)
553 /* DC_WIN_PRESCALED_SIZE 0x706 */
554 #define H_PRESCALED_SIZE_SHIFT 0
555 #define H_PRESCALED_SIZE_MASK (0x7FFF << H_PRESCALED_SIZE)
557 #define V_PRESCALED_SIZE_MASK (0x1FFF << V_PRESCALED_SIZE)
559 /* DC_WIN_DDA_INCREMENT 0x709 */
560 #define H_DDA_INC_SHIFT 0
561 #define H_DDA_INC_MASK (0xFFFF << H_DDA_INC_SHIFT)
563 #define V_DDA_INC_MASK (0xFFFF << V_DDA_INC_SHIFT)