Lines Matching +full:0 +full:xc883c000

10 #define GXBB_PERIPHS_BASE	0xc8834400
11 #define GXBB_HIU_BASE		0xc883c000
12 #define GXBB_ETH_BASE		0xc9410000
17 /* GPIO registers 0 to 6 */
18 #define _GXBB_GPIO_OFF(n)	((n) == 6 ? 0x08 : 0x0c + 3 * (n))
19 #define GXBB_GPIO_EN(n)		GXBB_PERIPHS_ADDR(_GXBB_GPIO_OFF(n) + 0)
23 #define GXBB_ETH_REG_0		GXBB_PERIPHS_ADDR(0x50)
24 #define GXBB_ETH_REG_1		GXBB_PERIPHS_ADDR(0x51)
26 #define GXBB_ETH_REG_0_PHY_INTF		BIT(0)
35 #define GXBB_MEM_PD_REG_0	GXBB_HIU_ADDR(0x40)
41 #define GXBB_GCLK_MPEG_0	GXBB_HIU_ADDR(0x50)
42 #define GXBB_GCLK_MPEG_1	GXBB_HIU_ADDR(0x51)
43 #define GXBB_GCLK_MPEG_2	GXBB_HIU_ADDR(0x52)
44 #define GXBB_GCLK_MPEG_OTHER	GXBB_HIU_ADDR(0x53)
45 #define GXBB_GCLK_MPEG_AO	GXBB_HIU_ADDR(0x54)