Lines Matching full:offset
78 unsigned int wkclkstctrl; /* offset 0x00 */
79 unsigned int wkctrlclkctrl; /* offset 0x04 */
80 unsigned int wkgpio0clkctrl; /* offset 0x08 */
81 unsigned int wkl4wkclkctrl; /* offset 0x0c */
82 unsigned int timer0clkctrl; /* offset 0x10 */
84 unsigned int idlestdpllmpu; /* offset 0x20 */
87 unsigned int clkseldpllmpu; /* offset 0x2c */
89 unsigned int idlestdpllddr; /* offset 0x34 */
91 unsigned int clkseldpllddr; /* offset 0x40 */
93 unsigned int clkseldplldisp; /* offset 0x54 */
95 unsigned int idlestdpllcore; /* offset 0x5c */
97 unsigned int clkseldpllcore; /* offset 0x68 */
99 unsigned int idlestdpllper; /* offset 0x70 */
101 unsigned int clkdcoldodpllper; /* offset 0x7c */
102 unsigned int divm4dpllcore; /* offset 0x80 */
103 unsigned int divm5dpllcore; /* offset 0x84 */
104 unsigned int clkmoddpllmpu; /* offset 0x88 */
105 unsigned int clkmoddpllper; /* offset 0x8c */
106 unsigned int clkmoddpllcore; /* offset 0x90 */
107 unsigned int clkmoddpllddr; /* offset 0x94 */
108 unsigned int clkmoddplldisp; /* offset 0x98 */
109 unsigned int clkseldpllper; /* offset 0x9c */
110 unsigned int divm2dpllddr; /* offset 0xA0 */
111 unsigned int divm2dplldisp; /* offset 0xA4 */
112 unsigned int divm2dpllmpu; /* offset 0xA8 */
113 unsigned int divm2dpllper; /* offset 0xAC */
115 unsigned int wkup_uart0ctrl; /* offset 0xB4 */
116 unsigned int wkup_i2c0ctrl; /* offset 0xB8 */
117 unsigned int wkup_adctscctrl; /* offset 0xBC */
119 unsigned int timer1clkctrl; /* offset 0xC4 */
121 unsigned int divm6dpllcore; /* offset 0xD8 */
129 unsigned int l4lsclkstctrl; /* offset 0x00 */
130 unsigned int l3sclkstctrl; /* offset 0x04 */
131 unsigned int l4fwclkstctrl; /* offset 0x08 */
132 unsigned int l3clkstctrl; /* offset 0x0c */
134 unsigned int cpgmac0clkctrl; /* offset 0x14 */
135 unsigned int lcdclkctrl; /* offset 0x18 */
136 unsigned int usb0clkctrl; /* offset 0x1C */
138 unsigned int tptc0clkctrl; /* offset 0x24 */
139 unsigned int emifclkctrl; /* offset 0x28 */
140 unsigned int ocmcramclkctrl; /* offset 0x2c */
141 unsigned int gpmcclkctrl; /* offset 0x30 */
142 unsigned int mcasp0clkctrl; /* offset 0x34 */
143 unsigned int uart5clkctrl; /* offset 0x38 */
144 unsigned int mmc0clkctrl; /* offset 0x3C */
145 unsigned int elmclkctrl; /* offset 0x40 */
146 unsigned int i2c2clkctrl; /* offset 0x44 */
147 unsigned int i2c1clkctrl; /* offset 0x48 */
148 unsigned int spi0clkctrl; /* offset 0x4C */
149 unsigned int spi1clkctrl; /* offset 0x50 */
151 unsigned int l4lsclkctrl; /* offset 0x60 */
152 unsigned int l4fwclkctrl; /* offset 0x64 */
153 unsigned int mcasp1clkctrl; /* offset 0x68 */
154 unsigned int uart1clkctrl; /* offset 0x6C */
155 unsigned int uart2clkctrl; /* offset 0x70 */
156 unsigned int uart3clkctrl; /* offset 0x74 */
157 unsigned int uart4clkctrl; /* offset 0x78 */
158 unsigned int timer7clkctrl; /* offset 0x7C */
159 unsigned int timer2clkctrl; /* offset 0x80 */
160 unsigned int timer3clkctrl; /* offset 0x84 */
161 unsigned int timer4clkctrl; /* offset 0x88 */
163 unsigned int gpio1clkctrl; /* offset 0xAC */
164 unsigned int gpio2clkctrl; /* offset 0xB0 */
165 unsigned int gpio3clkctrl; /* offset 0xB4 */
167 unsigned int tpccclkctrl; /* offset 0xBC */
168 unsigned int dcan0clkctrl; /* offset 0xC0 */
169 unsigned int dcan1clkctrl; /* offset 0xC4 */
171 unsigned int epwmss1clkctrl; /* offset 0xCC */
172 unsigned int emiffwclkctrl; /* offset 0xD0 */
173 unsigned int epwmss0clkctrl; /* offset 0xD4 */
174 unsigned int epwmss2clkctrl; /* offset 0xD8 */
175 unsigned int l3instrclkctrl; /* offset 0xDC */
176 unsigned int l3clkctrl; /* Offset 0xE0 */
178 unsigned int timer5clkctrl; /* offset 0xEC */
179 unsigned int timer6clkctrl; /* offset 0xF0 */
180 unsigned int mmc1clkctrl; /* offset 0xF4 */
181 unsigned int mmc2clkctrl; /* offset 0xF8 */
183 unsigned int l4hsclkstctrl; /* offset 0x11C */
184 unsigned int l4hsclkctrl; /* offset 0x120 */
186 unsigned int cpswclkstctrl; /* offset 0x144 */
187 unsigned int lcdcclkstctrl; /* offset 0x148 */
193 unsigned int clktimer7clk; /* offset 0x04 */
194 unsigned int clktimer2clk; /* offset 0x08 */
195 unsigned int clktimer3clk; /* offset 0x0C */
196 unsigned int clktimer4clk; /* offset 0x10 */
198 unsigned int clktimer5clk; /* offset 0x18 */
199 unsigned int clktimer6clk; /* offset 0x1C */
201 unsigned int clktimer1clk; /* offset 0x28 */
203 unsigned int clklcdcpixelclk; /* offset 0x34 */
215 unsigned int wkl4wkclkctrl; /* offset 0x220 */
217 unsigned int usbphy0clkctrl; /* offset 0x240 */
219 unsigned int usbphy1clkctrl; /* offset 0x248 */
221 unsigned int wkclkstctrl; /* offset 0x300 */
223 unsigned int wkup_i2c0ctrl; /* offset 0x340 */
225 unsigned int wkup_uart0ctrl; /* offset 0x348 */
227 unsigned int wkctrlclkctrl; /* offset 0x360 */
229 unsigned int wkgpio0clkctrl; /* offset 0x368 */
232 unsigned int clkmoddpllcore; /* offset 0x520 */
233 unsigned int idlestdpllcore; /* offset 0x524 */
235 unsigned int clkseldpllcore; /* offset 0x52C */
237 unsigned int divm4dpllcore; /* offset 0x538 */
238 unsigned int divm5dpllcore; /* offset 0x53C */
239 unsigned int divm6dpllcore; /* offset 0x540 */
242 unsigned int clkmoddpllmpu; /* offset 0x560 */
243 unsigned int idlestdpllmpu; /* offset 0x564 */
245 unsigned int clkseldpllmpu; /* offset 0x56c */
246 unsigned int divm2dpllmpu; /* offset 0x570 */
249 unsigned int clkmoddpllddr; /* offset 0x5A0 */
250 unsigned int idlestdpllddr; /* offset 0x5A4 */
252 unsigned int clkseldpllddr; /* offset 0x5AC */
253 unsigned int divm2dpllddr; /* offset 0x5B0 */
256 unsigned int clkmoddpllper; /* offset 0x5E0 */
257 unsigned int idlestdpllper; /* offset 0x5E4 */
259 unsigned int clkseldpllper; /* offset 0x5EC */
260 unsigned int divm2dpllper; /* offset 0x5F0 */
262 unsigned int clkdcoldodpllper; /* offset 0x614 */
265 unsigned int clkmoddplldisp; /* offset 0x620 */
267 unsigned int clkseldplldisp; /* offset 0x62C */
268 unsigned int divm2dplldisp; /* offset 0x630 */
276 unsigned int l3clkstctrl; /* offset 0x00 */
278 unsigned int l3clkctrl; /* Offset 0x20 */
280 unsigned int l3instrclkctrl; /* offset 0x40 */
282 unsigned int ocmcramclkctrl; /* offset 0x50 */
284 unsigned int tpccclkctrl; /* offset 0x78 */
286 unsigned int tptc0clkctrl; /* offset 0x80 */
289 unsigned int l4hsclkctrl; /* offset 0x0A0 */
291 unsigned int l4fwclkctrl; /* offset 0x0A8 */
293 unsigned int l3sclkstctrl; /* offset 0x200 */
295 unsigned int gpmcclkctrl; /* offset 0x220 */
297 unsigned int mcasp0clkctrl; /* offset 0x238 */
299 unsigned int mcasp1clkctrl; /* offset 0x240 */
301 unsigned int mmc2clkctrl; /* offset 0x248 */
303 unsigned int qspiclkctrl; /* offset 0x258 */
305 unsigned int usb0clkctrl; /* offset 0x260 */
307 unsigned int usb1clkctrl; /* offset 0x268 */
309 unsigned int l4lsclkstctrl; /* offset 0x400 */
311 unsigned int l4lsclkctrl; /* offset 0x420 */
313 unsigned int dcan0clkctrl; /* offset 0x428 */
315 unsigned int dcan1clkctrl; /* offset 0x430 */
317 unsigned int elmclkctrl; /* offset 0x468 */
320 unsigned int gpio1clkctrl; /* offset 0x478 */
322 unsigned int gpio2clkctrl; /* offset 0x480 */
324 unsigned int gpio3clkctrl; /* offset 0x488 */
326 unsigned int gpio4clkctrl; /* offset 0x490 */
328 unsigned int gpio5clkctrl; /* offset 0x498 */
331 unsigned int i2c1clkctrl; /* offset 0x4A8 */
333 unsigned int i2c2clkctrl; /* offset 0x4B0 */
335 unsigned int mmc0clkctrl; /* offset 0x4C0 */
337 unsigned int mmc1clkctrl; /* offset 0x4C8 */
340 unsigned int spi0clkctrl; /* offset 0x500 */
342 unsigned int spi1clkctrl; /* offset 0x508 */
344 unsigned int timer2clkctrl; /* offset 0x530 */
346 unsigned int timer3clkctrl; /* offset 0x538 */
348 unsigned int timer4clkctrl; /* offset 0x540 */
350 unsigned int timer7clkctrl; /* offset 0x558 */
353 unsigned int uart1clkctrl; /* offset 0x580 */
355 unsigned int uart2clkctrl; /* offset 0x588 */
357 unsigned int uart3clkctrl; /* offset 0x590 */
359 unsigned int uart4clkctrl; /* offset 0x598 */
361 unsigned int uart5clkctrl; /* offset 0x5A0 */
363 unsigned int usbphyocp2scp0clkctrl; /* offset 0x5B8 */
365 unsigned int usbphyocp2scp1clkctrl; /* offset 0x5C0 */
368 unsigned int emifclkstctrl; /* offset 0x700 */
370 unsigned int emifclkctrl; /* offset 0x720 */
372 unsigned int emiffwclkctrl; /* offset 0x730 */
374 unsigned int otfaemifclkctrl; /* offset 0x738 */
376 unsigned int lcdclkctrl; /* offset 0x820 */
378 unsigned int cpswclkstctrl; /* offset 0xB00 */
380 unsigned int cpgmac0clkctrl; /* offset 0xB20 */
395 unsigned int clktimer2clk; /* offset 0x04 */
397 unsigned int clkselmacclk; /* offset 0x34 */
403 unsigned int rtcclkctrl; /* offset 0x0 */
404 unsigned int clkstctrl; /* offset 0x4 */
409 unsigned int tidr; /* offset 0x00 */
411 unsigned int tiocp_cfg; /* offset 0x10 */
413 unsigned int tier; /* offset 0x20 */
414 unsigned int tistatr; /* offset 0x24 */
415 unsigned int tistat; /* offset 0x28 */
416 unsigned int tisr; /* offset 0x2c */
417 unsigned int tcicr; /* offset 0x30 */
418 unsigned int twer; /* offset 0x34 */
419 unsigned int tclr; /* offset 0x38 */
420 unsigned int tcrr; /* offset 0x3c */
421 unsigned int tldr; /* offset 0x40 */
422 unsigned int ttgr; /* offset 0x44 */
423 unsigned int twpc; /* offset 0x48 */
424 unsigned int tmar; /* offset 0x4c */
425 unsigned int tcar1; /* offset 0x50 */
426 unsigned int tscir; /* offset 0x54 */
427 unsigned int tcar2; /* offset 0x58 */
433 unsigned int uartsyscfg; /* offset 0x54 */
434 unsigned int uartsyssts; /* offset 0x58 */
447 unsigned int secure_emif_sdram_config; /* offset 0x0110 */
481 unsigned int deviceid; /* offset 0x00 */
483 unsigned int usb_ctrl0; /* offset 0x20 */
485 unsigned int usb_ctrl1; /* offset 0x28 */
487 unsigned int macid0l; /* offset 0x30 */
488 unsigned int macid0h; /* offset 0x34 */
489 unsigned int macid1l; /* offset 0x38 */
490 unsigned int macid1h; /* offset 0x3c */
492 unsigned int miisel; /* offset 0x50 */
494 unsigned int mreqprio_0; /* offset 0x70 */
495 unsigned int mreqprio_1; /* offset 0x74 */
497 unsigned int efuse_sma; /* offset 0x1FC */