Lines Matching +full:gic +full:- +full:timer
4 * (C) Copyright 2014 - 2015, Xilinx, Inc.
8 * SPDX-License-Identifier: GPL-2.0+
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
18 #size-cells = <0>;
21 compatible = "arm,cortex-a53", "arm,armv8";
23 enable-method = "psci";
25 cpu-idle-states = <&CPU_SLEEP_0>;
29 compatible = "arm,cortex-a53", "arm,armv8";
31 enable-method = "psci";
33 cpu-idle-states = <&CPU_SLEEP_0>;
37 compatible = "arm,cortex-a53", "arm,armv8";
39 enable-method = "psci";
41 cpu-idle-states = <&CPU_SLEEP_0>;
45 compatible = "arm,cortex-a53", "arm,armv8";
47 enable-method = "psci";
49 cpu-idle-states = <&CPU_SLEEP_0>;
52 idle-states {
53 entry-mehod = "arm,psci";
55 CPU_SLEEP_0: cpu-sleep-0 {
56 compatible = "arm,idle-state";
57 arm,psci-suspend-param = <0x40000000>;
58 local-timer-stop;
59 entry-latency-us = <300>;
60 exit-latency-us = <600>;
61 min-residency-us = <800000>;
69 u-boot,dm-pre-reloc;
72 power-domains {
73 compatible = "xlnx,zynqmp-genpd";
75 pd_usb0: pd-usb0 {
76 #power-domain-cells = <0x0>;
77 pd-id = <0x16>;
80 pd_usb1: pd-usb1 {
81 #power-domain-cells = <0x0>;
82 pd-id = <0x17>;
85 pd_sata: pd-sata {
86 #power-domain-cells = <0x0>;
87 pd-id = <0x1c>;
90 pd_spi0: pd-spi0 {
91 #power-domain-cells = <0x0>;
92 pd-id = <0x23>;
95 pd_spi1: pd-spi1 {
96 #power-domain-cells = <0x0>;
97 pd-id = <0x24>;
100 pd_uart0: pd-uart0 {
101 #power-domain-cells = <0x0>;
102 pd-id = <0x21>;
105 pd_uart1: pd-uart1 {
106 #power-domain-cells = <0x0>;
107 pd-id = <0x22>;
110 pd_eth0: pd-eth0 {
111 #power-domain-cells = <0x0>;
112 pd-id = <0x1d>;
115 pd_eth1: pd-eth1 {
116 #power-domain-cells = <0x0>;
117 pd-id = <0x1e>;
120 pd_eth2: pd-eth2 {
121 #power-domain-cells = <0x0>;
122 pd-id = <0x1f>;
125 pd_eth3: pd-eth3 {
126 #power-domain-cells = <0x0>;
127 pd-id = <0x20>;
130 pd_i2c0: pd-i2c0 {
131 #power-domain-cells = <0x0>;
132 pd-id = <0x25>;
135 pd_i2c1: pd-i2c1 {
136 #power-domain-cells = <0x0>;
137 pd-id = <0x26>;
140 pd_dp: pd-dp {
142 #power-domain-cells = <0x0>;
143 pd-id = <0x29>;
146 pd_gdma: pd-gdma {
147 #power-domain-cells = <0x0>;
148 pd-id = <0x2a>;
151 pd_adma: pd-adma {
152 #power-domain-cells = <0x0>;
153 pd-id = <0x2b>;
156 pd_ttc0: pd-ttc0 {
157 #power-domain-cells = <0x0>;
158 pd-id = <0x18>;
161 pd_ttc1: pd-ttc1 {
162 #power-domain-cells = <0x0>;
163 pd-id = <0x19>;
166 pd_ttc2: pd-ttc2 {
167 #power-domain-cells = <0x0>;
168 pd-id = <0x1a>;
171 pd_ttc3: pd-ttc3 {
172 #power-domain-cells = <0x0>;
173 pd-id = <0x1b>;
176 pd_sd0: pd-sd0 {
177 #power-domain-cells = <0x0>;
178 pd-id = <0x27>;
181 pd_sd1: pd-sd1 {
182 #power-domain-cells = <0x0>;
183 pd-id = <0x28>;
186 pd_nand: pd-nand {
187 #power-domain-cells = <0x0>;
188 pd-id = <0x2c>;
191 pd_qspi: pd-qspi {
192 #power-domain-cells = <0x0>;
193 pd-id = <0x2d>;
196 pd_gpio: pd-gpio {
197 #power-domain-cells = <0x0>;
198 pd-id = <0x2e>;
201 pd_can0: pd-can0 {
202 #power-domain-cells = <0x0>;
203 pd-id = <0x2f>;
206 pd_can1: pd-can1 {
207 #power-domain-cells = <0x0>;
208 pd-id = <0x30>;
211 pd_pcie: pd-pcie {
212 #power-domain-cells = <0x0>;
213 pd-id = <0x3b>;
216 pd_gpu: pd-gpu {
217 #power-domain-cells = <0x0>;
218 pd-id = <0x3a 0x14 0x15>;
223 compatible = "arm,armv8-pmuv3";
224 interrupt-parent = <&gic>;
232 compatible = "arm,psci-0.2";
237 compatible = "xlnx,zynqmp-pm";
241 timer {
242 compatible = "arm,armv8-timer";
243 interrupt-parent = <&gic>;
251 compatible = "arm,cortex-a53-edac";
255 compatible = "xlnx,zynqmp-pcap-fpga";
259 compatible = "simple-bus";
260 #address-cells = <2>;
261 #size-cells = <1>;
264 gic: interrupt-controller@f9010000 { label
265 compatible = "arm,gic-400", "arm,cortex-a15-gic";
266 #interrupt-cells = <3>;
271 interrupt-controller;
272 interrupt-parent = <&gic>;
278 compatible = "simple-bus";
279 u-boot,dm-pre-reloc;
280 #address-cells = <2>;
281 #size-cells = <2>;
285 compatible = "xlnx,zynq-can-1.0";
287 clock-names = "can_clk", "pclk";
290 interrupt-parent = <&gic>;
291 tx-fifo-depth = <0x40>;
292 rx-fifo-depth = <0x40>;
293 power-domains = <&pd_can0>;
297 compatible = "xlnx,zynq-can-1.0";
299 clock-names = "can_clk", "pclk";
302 interrupt-parent = <&gic>;
303 tx-fifo-depth = <0x40>;
304 rx-fifo-depth = <0x40>;
305 power-domains = <&pd_can1>;
309 compatible = "arm,cci-400";
312 #address-cells = <1>;
313 #size-cells = <1>;
316 compatible = "arm,cci-400-pmu,r1";
318 interrupt-parent = <&gic>;
330 compatible = "xlnx,zynqmp-dma-1.0";
332 interrupt-parent = <&gic>;
334 clock-names = "clk_main", "clk_apb";
335 xlnx,bus-width = <128>;
336 #stream-id-cells = <1>;
338 power-domains = <&pd_gdma>;
343 compatible = "xlnx,zynqmp-dma-1.0";
345 interrupt-parent = <&gic>;
347 clock-names = "clk_main", "clk_apb";
348 xlnx,bus-width = <128>;
349 #stream-id-cells = <1>;
351 power-domains = <&pd_gdma>;
356 compatible = "xlnx,zynqmp-dma-1.0";
358 interrupt-parent = <&gic>;
360 clock-names = "clk_main", "clk_apb";
361 xlnx,bus-width = <128>;
362 #stream-id-cells = <1>;
364 power-domains = <&pd_gdma>;
369 compatible = "xlnx,zynqmp-dma-1.0";
371 interrupt-parent = <&gic>;
373 clock-names = "clk_main", "clk_apb";
374 xlnx,bus-width = <128>;
375 #stream-id-cells = <1>;
377 power-domains = <&pd_gdma>;
382 compatible = "xlnx,zynqmp-dma-1.0";
384 interrupt-parent = <&gic>;
386 clock-names = "clk_main", "clk_apb";
387 xlnx,bus-width = <128>;
388 #stream-id-cells = <1>;
390 power-domains = <&pd_gdma>;
395 compatible = "xlnx,zynqmp-dma-1.0";
397 interrupt-parent = <&gic>;
399 clock-names = "clk_main", "clk_apb";
400 xlnx,bus-width = <128>;
401 #stream-id-cells = <1>;
403 power-domains = <&pd_gdma>;
408 compatible = "xlnx,zynqmp-dma-1.0";
410 interrupt-parent = <&gic>;
412 clock-names = "clk_main", "clk_apb";
413 xlnx,bus-width = <128>;
414 #stream-id-cells = <1>;
416 power-domains = <&pd_gdma>;
421 compatible = "xlnx,zynqmp-dma-1.0";
423 interrupt-parent = <&gic>;
425 clock-names = "clk_main", "clk_apb";
426 xlnx,bus-width = <128>;
427 #stream-id-cells = <1>;
429 power-domains = <&pd_gdma>;
434 compatible = "arm,mali-400", "arm,mali-utgard";
436 interrupt-parent = <&gic>;
438 interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
439 power-domains = <&pd_gpu>;
448 compatible = "xlnx,zynqmp-dma-1.0";
449 clock-names = "clk_main", "clk_apb";
451 interrupt-parent = <&gic>;
453 xlnx,bus-width = <64>;
454 #stream-id-cells = <1>;
456 power-domains = <&pd_adma>;
461 compatible = "xlnx,zynqmp-dma-1.0";
462 clock-names = "clk_main", "clk_apb";
464 interrupt-parent = <&gic>;
466 xlnx,bus-width = <64>;
467 #stream-id-cells = <1>;
469 power-domains = <&pd_adma>;
474 compatible = "xlnx,zynqmp-dma-1.0";
475 clock-names = "clk_main", "clk_apb";
477 interrupt-parent = <&gic>;
479 xlnx,bus-width = <64>;
480 #stream-id-cells = <1>;
482 power-domains = <&pd_adma>;
487 compatible = "xlnx,zynqmp-dma-1.0";
488 clock-names = "clk_main", "clk_apb";
490 interrupt-parent = <&gic>;
492 xlnx,bus-width = <64>;
493 #stream-id-cells = <1>;
495 power-domains = <&pd_adma>;
500 compatible = "xlnx,zynqmp-dma-1.0";
501 clock-names = "clk_main", "clk_apb";
503 interrupt-parent = <&gic>;
505 xlnx,bus-width = <64>;
506 #stream-id-cells = <1>;
508 power-domains = <&pd_adma>;
513 compatible = "xlnx,zynqmp-dma-1.0";
514 clock-names = "clk_main", "clk_apb";
516 interrupt-parent = <&gic>;
518 xlnx,bus-width = <64>;
519 #stream-id-cells = <1>;
521 power-domains = <&pd_adma>;
526 compatible = "xlnx,zynqmp-dma-1.0";
527 clock-names = "clk_main", "clk_apb";
529 interrupt-parent = <&gic>;
531 xlnx,bus-width = <64>;
532 #stream-id-cells = <1>;
534 power-domains = <&pd_adma>;
539 compatible = "xlnx,zynqmp-dma-1.0";
540 clock-names = "clk_main", "clk_apb";
542 interrupt-parent = <&gic>;
544 xlnx,bus-width = <64>;
545 #stream-id-cells = <1>;
547 power-domains = <&pd_adma>;
550 mc: memory-controller@fd070000 {
551 compatible = "xlnx,zynqmp-ddrc-2.40a";
553 interrupt-parent = <&gic>;
558 compatible = "arasan,nfc-v3p10";
561 clock-names = "clk_sys", "clk_flash";
562 interrupt-parent = <&gic>;
564 #address-cells = <2>;
565 #size-cells = <1>;
566 #stream-id-cells = <1>;
568 power-domains = <&pd_nand>;
572 compatible = "cdns,zynqmp-gem";
574 interrupt-parent = <&gic>;
577 clock-names = "pclk", "hclk", "tx_clk";
578 #address-cells = <1>;
579 #size-cells = <0>;
580 #stream-id-cells = <1>;
582 power-domains = <&pd_eth0>;
586 compatible = "cdns,zynqmp-gem";
588 interrupt-parent = <&gic>;
591 clock-names = "pclk", "hclk", "tx_clk";
592 #address-cells = <1>;
593 #size-cells = <0>;
594 #stream-id-cells = <1>;
596 power-domains = <&pd_eth1>;
600 compatible = "cdns,zynqmp-gem";
602 interrupt-parent = <&gic>;
605 clock-names = "pclk", "hclk", "tx_clk";
606 #address-cells = <1>;
607 #size-cells = <0>;
608 #stream-id-cells = <1>;
610 power-domains = <&pd_eth2>;
614 compatible = "cdns,zynqmp-gem";
616 interrupt-parent = <&gic>;
619 clock-names = "pclk", "hclk", "tx_clk";
620 #address-cells = <1>;
621 #size-cells = <0>;
622 #stream-id-cells = <1>;
624 power-domains = <&pd_eth3>;
628 compatible = "xlnx,zynqmp-gpio-1.0";
630 #gpio-cells = <0x2>;
631 interrupt-parent = <&gic>;
633 interrupt-controller;
634 #interrupt-cells = <2>;
636 power-domains = <&pd_gpio>;
640 compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
642 interrupt-parent = <&gic>;
645 #address-cells = <1>;
646 #size-cells = <0>;
647 power-domains = <&pd_i2c0>;
651 compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
653 interrupt-parent = <&gic>;
656 #address-cells = <1>;
657 #size-cells = <0>;
658 power-domains = <&pd_i2c1>;
661 ocm: memory-controller@ff960000 {
662 compatible = "xlnx,zynqmp-ocmc-1.0";
664 interrupt-parent = <&gic>;
669 compatible = "xlnx,nwl-pcie-2.11";
671 #address-cells = <3>;
672 #size-cells = <2>;
673 #interrupt-cells = <1>;
674 msi-controller;
676 interrupt-parent = <&gic>;
682 interrupt-names = "misc","dummy","intx", "msi1", "msi0";
683 msi-parent = <&pcie>;
687 reg-names = "breg", "pcireg", "cfg";
688 …ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-pref…
690 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
691 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
695 power-domains = <&pd_pcie>;
696 pcie_intc: legacy-interrupt-controller {
697 interrupt-controller;
698 #address-cells = <0>;
699 #interrupt-cells = <1>;
704 compatible = "xlnx,zynqmp-qspi-1.0";
706 clock-names = "ref_clk", "pclk";
708 interrupt-parent = <&gic>;
709 num-cs = <1>;
712 #address-cells = <1>;
713 #size-cells = <0>;
714 #stream-id-cells = <1>;
716 power-domains = <&pd_qspi>;
720 compatible = "xlnx,zynqmp-rtc";
723 interrupt-parent = <&gic>;
725 interrupt-names = "alarm", "sec";
729 compatible = "xlnx,zynqmp-psgtr";
735 reg-names = "serdes", "siou", "fpd", "lpd";
738 #phy-cells = <4>;
741 #phy-cells = <4>;
744 #phy-cells = <4>;
747 #phy-cells = <4>;
752 compatible = "ceva,ahci-1v84";
755 interrupt-parent = <&gic>;
757 power-domains = <&pd_sata>;
761 u-boot,dm-pre-reloc;
762 compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
764 interrupt-parent = <&gic>;
767 clock-names = "clk_xin", "clk_ahb";
769 #stream-id-cells = <1>;
771 power-domains = <&pd_sd0>;
775 u-boot,dm-pre-reloc;
776 compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
778 interrupt-parent = <&gic>;
781 clock-names = "clk_xin", "clk_ahb";
783 #stream-id-cells = <1>;
785 power-domains = <&pd_sd1>;
789 compatible = "arm,mmu-500";
791 #iommu-cells = <1>;
792 #global-interrupts = <1>;
793 interrupt-parent = <&gic>;
799 mmu-masters = < &gem0 0x874
828 compatible = "cdns,spi-r1p6";
830 interrupt-parent = <&gic>;
833 clock-names = "ref_clk", "pclk";
834 #address-cells = <1>;
835 #size-cells = <0>;
836 power-domains = <&pd_spi0>;
840 compatible = "cdns,spi-r1p6";
842 interrupt-parent = <&gic>;
845 clock-names = "ref_clk", "pclk";
846 #address-cells = <1>;
847 #size-cells = <0>;
848 power-domains = <&pd_spi1>;
851 ttc0: timer@ff110000 {
854 interrupt-parent = <&gic>;
857 timer-width = <32>;
858 power-domains = <&pd_ttc0>;
861 ttc1: timer@ff120000 {
864 interrupt-parent = <&gic>;
867 timer-width = <32>;
868 power-domains = <&pd_ttc1>;
871 ttc2: timer@ff130000 {
874 interrupt-parent = <&gic>;
877 timer-width = <32>;
878 power-domains = <&pd_ttc2>;
881 ttc3: timer@ff140000 {
884 interrupt-parent = <&gic>;
887 timer-width = <32>;
888 power-domains = <&pd_ttc3>;
892 u-boot,dm-pre-reloc;
893 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
895 interrupt-parent = <&gic>;
898 clock-names = "uart_clk", "pclk";
899 power-domains = <&pd_uart0>;
903 u-boot,dm-pre-reloc;
904 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
906 interrupt-parent = <&gic>;
909 clock-names = "uart_clk", "pclk";
910 power-domains = <&pd_uart1>;
914 #address-cells = <2>;
915 #size-cells = <2>;
917 compatible = "xlnx,zynqmp-dwc3";
918 clock-names = "bus_clk", "ref_clk";
920 #stream-id-cells = <1>;
922 power-domains = <&pd_usb0>;
929 interrupt-parent = <&gic>;
931 /* snps,quirk-frame-length-adjustment = <0x20>; */
937 #address-cells = <2>;
938 #size-cells = <2>;
940 compatible = "xlnx,zynqmp-dwc3";
941 clock-names = "bus_clk", "ref_clk";
943 #stream-id-cells = <1>;
945 power-domains = <&pd_usb1>;
952 interrupt-parent = <&gic>;
954 /* snps,quirk-frame-length-adjustment = <0x20>; */
960 compatible = "cdns,wdt-r1p2";
962 interrupt-parent = <&gic>;
965 timeout-sec = <10>;
971 xlnx,encoder-slave = <&xlnx_dp>;
972 xlnx,connector-type = "DisplayPort";
973 xlnx,dp-sub = <&xlnx_dp_sub>;
975 xlnx,pixel-format = "rgb565";
978 dma-names = "dma0";
984 dma-names = "dma0", "dma1", "dma2";
990 compatible = "xlnx,v-dp";
994 interrupt-parent = <&gic>;
995 clock-names = "aclk", "aud_clk";
996 xlnx,dp-version = "v1.2";
997 xlnx,max-lanes = <2>;
998 xlnx,max-link-rate = <540000>;
999 xlnx,max-bpc = <16>;
1000 xlnx,enable-ycrcb;
1003 xlnx,audio-chan = <2>;
1004 xlnx,dp-sub = <&xlnx_dp_sub>;
1005 xlnx,max-pclock-frequency = <300000>;
1009 compatible = "xlnx,dp-snd-card";
1011 xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
1012 xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
1016 compatible = "xlnx,dp-snd-codec";
1018 clock-names = "aud_clk";
1022 compatible = "xlnx,dp-snd-pcm";
1025 dma-names = "tx";
1029 compatible = "xlnx,dp-snd-pcm";
1032 dma-names = "tx";
1036 compatible = "xlnx,dp-sub";
1041 reg-names = "blend", "av_buf", "aud";
1042 xlnx,output-fmt = "rgb";
1043 xlnx,vid-fmt = "yuyv";
1044 xlnx,gfx-fmt = "rgb565";
1052 interrupt-parent = <&gic>;
1053 clock-names = "axi_clk";
1054 dma-channels = <6>;
1055 #dma-cells = <1>;
1056 dma-video0channel {
1059 dma-video1channel {
1062 dma-video2channel {
1065 dma-graphicschannel {
1068 dma-audio0channel {
1071 dma-audio1channel {