arm/dts/zynqmp-zc1751-xm018-dc4.dts

2  * dts file for Xilinx ZynqMP zc1751-xm018-dc4
4  * (C) Copyright 2015 - 2016, Xilinx, Inc.
14 /dts-v1/;
17 #include "zynqmp-clk.dtsi"
20 	model = "ZynqMP zc1751-xm018-dc4";
21 	compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
41 		stdout-path = "serial0:115200n8";
61 	xlnx,include-sg; /* for testing purpose */
64 	xlnx,src-issue = <31>;
70 	xlnx,src-issue = <4>; /* for testing purpose */
79 	xlnx,include-sg; /* for testing purpose */
88 	xlnx,include-sg; /* for testing purpose */
97 	xlnx,include-sg; /* for testing purpose */
142 	local-mac-address = [00 0a 35 00 02 90];
143 	phy-mode = "rgmii-id";
144 	phy-handle = <&ethernet_phy0>;
145 	ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */
148 	ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */
151 	ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */
154 	ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */
161 	local-mac-address = [00 0a 35 00 02 91];
162 	phy-mode = "rgmii-id";
163 	phy-handle = <&ethernet_phy7>;
168 	local-mac-address = [00 0a 35 00 02 92];
169 	phy-mode = "rgmii-id";
170 	phy-handle = <&ethernet_phy3>;
175 	local-mac-address = [00 0a 35 00 02 93];
176 	phy-mode = "rgmii-id";
177 	phy-handle = <&ethernet_phy8>;
189 	clock-frequency = <400000>;
194 	clock-frequency = <400000>;