Lines Matching +full:clock +full:- +full:accuracy

2  * clock specification for Xilinx ZynqMP ep108 development board
8  * SPDX-License-Identifier:	GPL-2.0+
13 		compatible = "fixed-clock";
14 		#clock-cells = <0>;
15 		clock-frequency = <25000000>;
16 		u-boot,dm-pre-reloc;
20 		compatible = "fixed-clock";
21 		#clock-cells = <0x0>;
22 		clock-frequency = <111111111>;
26 		compatible = "fixed-clock";
27 		#clock-cells = <0>;
28 		clock-frequency = <75000000>;
32 		compatible = "fixed-clock";
33 		#clock-cells = <0>;
34 		clock-frequency = <50000000>;
35 		clock-accuracy = <100>;
39 		compatible = "fixed-clock";
40 		#clock-cells = <0>;
41 		clock-frequency = <100000000>;
45 		compatible = "fixed-clock";
46 		#clock-cells = <0>;
47 		clock-frequency = <600000000>;
51 		compatible = "fixed-clock";
52 		#clock-cells = <0>;
53 		clock-frequency = <22579200>;
54 		clock-accuracy = <100>;