Lines Matching +full:0 +full:xf8001000
17 #size-cells = <0>;
19 cpu0: cpu@0 {
22 reg = <0>;
51 interrupts = <0 5 4>, <0 6 4>;
53 reg = < 0xf8891000 0x1000 0xf8893000 0x1000 >;
75 reg = <0xf8007100 0x20>;
76 interrupts = <0 7 4>;
86 reg = <0xe0008000 0x1000>;
87 interrupts = <0 28 4>;
89 tx-fifo-depth = <0x40>;
90 rx-fifo-depth = <0x40>;
98 reg = <0xe0009000 0x1000>;
99 interrupts = <0 51 4>;
101 tx-fifo-depth = <0x40>;
102 rx-fifo-depth = <0x40>;
113 interrupts = <0 20 4>;
114 reg = <0xe000a000 0x1000>;
122 interrupts = <0 25 4>;
123 reg = <0xe0004000 0x1000>;
125 #size-cells = <0>;
133 interrupts = <0 48 4>;
134 reg = <0xe0005000 0x1000>;
136 #size-cells = <0>;
143 reg = <0xF8F01000 0x1000>,
144 <0xF8F00100 0x100>;
149 reg = <0xF8F02000 0x1000>;
150 interrupts = <0 2 4>;
159 reg = <0xf8006000 0x1000>;
167 reg = <0xE0000000 0x1000>;
168 interrupts = <0 27 4>;
176 reg = <0xE0001000 0x1000>;
177 interrupts = <0 50 4>;
182 reg = <0xe0006000 0x1000>;
185 interrupts = <0 26 4>;
189 #size-cells = <0>;
194 reg = <0xe0007000 0x1000>;
197 interrupts = <0 49 4>;
201 #size-cells = <0>;
210 interrupts = <0 19 4>;
211 reg = <0xe000d000 0x1000>;
213 #size-cells = <0>;
218 reg = <0xe000b000 0x1000>;
220 interrupts = <0 22 4>;
224 #size-cells = <0>;
229 reg = <0xe000c000 0x1000>;
231 interrupts = <0 45 4>;
235 #size-cells = <0>;
244 interrupts = <0 24 4>;
245 reg = <0xe0100000 0x1000>;
254 interrupts = <0 47 4>;
255 reg = <0xe0101000 0x1000>;
263 reg = <0xF8000000 0x1000>;
269 fclk-enable = <0>;
281 reg = <0x100 0x100>;
286 reg = <0x200 0x48>;
293 reg = <0x700 0x200>;
300 reg = <0xf8003000 0x1000>;
304 interrupts = <0 13 4>,
305 <0 14 4>, <0 15 4>,
306 <0 16 4>, <0 17 4>,
307 <0 40 4>, <0 41 4>,
308 <0 42 4>, <0 43 4>;
319 interrupts = <0 8 4>;
320 reg = <0xf8007000 0x100>;
328 reg = <0xf8f00200 0x20>;
329 interrupts = <1 11 0x301>;
336 interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
339 reg = <0xF8001000 0x1000>;
344 interrupts = <0 37 4>, <0 38 4>, <0 39 4>;
347 reg = <0xF8002000 0x1000>;
352 interrupts = <1 13 0x301>;
354 reg = <0xf8f00600 0x20>;
363 interrupts = <0 21 4>;
364 reg = <0xe0002000 0x1000>;
373 interrupts = <0 44 4>;
374 reg = <0xe0003000 0x1000>;
382 interrupts = <0 9 1>;
383 reg = <0xf8005000 0x1000>;