Lines Matching +full:0 +full:x5a000000
17 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
106 #clock-cells = <0>;
111 #clock-cells = <0>;
127 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
128 <0x506c0000 0x400>;
129 interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>;
140 reg = <0x54006800 0x40>;
141 interrupts = <0 33 4>;
143 pinctrl-0 = <&pinctrl_uart0>;
144 clocks = <&peri_clk 0>;
151 reg = <0x54006900 0x40>;
152 interrupts = <0 35 4>;
154 pinctrl-0 = <&pinctrl_uart1>;
162 reg = <0x54006a00 0x40>;
163 interrupts = <0 37 4>;
165 pinctrl-0 = <&pinctrl_uart2>;
173 reg = <0x54006b00 0x40>;
174 interrupts = <0 177 4>;
176 pinctrl-0 = <&pinctrl_uart3>;
183 reg = <0x55000008 0x8>;
190 reg = <0x55000010 0x8>;
197 reg = <0x55000018 0x8>;
204 reg = <0x55000020 0x8>;
211 reg = <0x55000028 0x8>;
218 reg = <0x55000030 0x8>;
225 reg = <0x55000038 0x8>;
232 reg = <0x55000040 0x8>;
239 reg = <0x55000048 0x8>;
246 reg = <0x55000050 0x8>;
253 reg = <0x55000058 0x8>;
260 reg = <0x55000068 0x8>;
267 reg = <0x55000070 0x8>;
274 reg = <0x55000078 0x8>;
281 reg = <0x55000080 0x8>;
288 reg = <0x55000088 0x8>;
295 reg = <0x550000a0 0x8>;
302 reg = <0x550000a8 0x8>;
309 reg = <0x550000b0 0x8>;
316 reg = <0x550000b8 0x8>;
323 reg = <0x550000c0 0x8>;
330 reg = <0x550000c8 0x8>;
337 reg = <0x550000d0 0x8>;
344 reg = <0x550000d8 0x8>;
351 reg = <0x550000e0 0x8>;
358 reg = <0x550000e8 0x8>;
365 reg = <0x550000f0 0x8>;
372 reg = <0x550000f8 0x8>;
380 reg = <0x58780000 0x80>;
382 #size-cells = <0>;
383 interrupts = <0 41 4>;
385 pinctrl-0 = <&pinctrl_i2c0>;
393 reg = <0x58781000 0x80>;
395 #size-cells = <0>;
396 interrupts = <0 42 4>;
398 pinctrl-0 = <&pinctrl_i2c1>;
406 reg = <0x58782000 0x80>;
408 #size-cells = <0>;
409 interrupts = <0 43 4>;
411 pinctrl-0 = <&pinctrl_i2c2>;
419 reg = <0x58783000 0x80>;
421 #size-cells = <0>;
422 interrupts = <0 44 4>;
424 pinctrl-0 = <&pinctrl_i2c3>;
432 reg = <0x58784000 0x80>;
434 #size-cells = <0>;
435 interrupts = <0 45 4>;
443 reg = <0x58785000 0x80>;
445 #size-cells = <0>;
446 interrupts = <0 25 4>;
454 reg = <0x58786000 0x80>;
456 #size-cells = <0>;
457 interrupts = <0 26 4>;
465 reg = <0x58c00000 0x400>;
469 pinctrl-0 = <&pinctrl_system_bus>;
474 reg = <0x59801000 0x400>;
480 reg = <0x59810000 0x400>;
497 reg = <0x59820000 0x200>;
513 reg = <0x5a000000 0x800>;
514 interrupts = <0 78 4>;
516 pinctrl-0 = <&pinctrl_emmc>;
530 reg = <0x5a400000 0x800>;
531 interrupts = <0 76 4>;
533 pinctrl-0 = <&pinctrl_sd>;
535 clocks = <&sd_clk 0>;
537 resets = <&sd_rst 0>;
548 reg = <0x5f800000 0x2000>;
559 reg = <0x5fc20000 0x200>;
566 reg = <0x60000200 0x20>;
567 interrupts = <1 11 0xf04>;
573 reg = <0x60000600 0x20>;
574 interrupts = <1 13 0xf04>;
580 reg = <0x60001000 0x1000>,
581 <0x60000100 0x100>;
589 reg = <0x61840000 0x10000>;
605 reg = <0x65b00000 0x1000>;
610 pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
613 reg = <0x65a00000 0x10000>;
614 interrupts = <0 134 4>;
623 reg = <0x65d00000 0x1000>;
628 pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
631 reg = <0x65c00000 0x10000>;
632 interrupts = <0 137 4>;
642 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
643 interrupts = <0 65 4>;
645 pinctrl-0 = <&pinctrl_nand2cs>;