Lines Matching +full:0 +full:x59810000
17 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
118 #clock-cells = <0>;
123 #clock-cells = <0>;
139 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
140 <0x506c0000 0x400>;
141 interrupts = <0 190 4>, <0 191 4>;
152 reg = <0x500c8000 0x2000>, <0x503c8100 0x8>,
153 <0x506c8000 0x400>;
154 interrupts = <0 174 4>, <0 175 4>;
165 reg = <0x54006800 0x40>;
166 interrupts = <0 33 4>;
168 pinctrl-0 = <&pinctrl_uart0>;
169 clocks = <&peri_clk 0>;
176 reg = <0x54006900 0x40>;
177 interrupts = <0 35 4>;
179 pinctrl-0 = <&pinctrl_uart1>;
187 reg = <0x54006a00 0x40>;
188 interrupts = <0 37 4>;
190 pinctrl-0 = <&pinctrl_uart2>;
198 reg = <0x54006b00 0x40>;
199 interrupts = <0 177 4>;
201 pinctrl-0 = <&pinctrl_uart3>;
208 reg = <0x55000008 0x8>;
215 reg = <0x55000010 0x8>;
222 reg = <0x55000018 0x8>;
229 reg = <0x55000020 0x8>;
236 reg = <0x55000028 0x8>;
243 reg = <0x55000030 0x8>;
250 reg = <0x55000038 0x8>;
257 reg = <0x55000040 0x8>;
264 reg = <0x55000048 0x8>;
271 reg = <0x55000050 0x8>;
278 reg = <0x55000058 0x8>;
285 reg = <0x55000060 0x8>;
292 reg = <0x55000068 0x8>;
299 reg = <0x55000070 0x8>;
306 reg = <0x55000078 0x8>;
313 reg = <0x550000a0 0x8>;
320 reg = <0x550000a8 0x8>;
327 reg = <0x550000b0 0x8>;
334 reg = <0x550000b8 0x8>;
341 reg = <0x550000c0 0x8>;
348 reg = <0x550000c8 0x8>;
355 reg = <0x550000d0 0x8>;
362 reg = <0x550000d8 0x8>;
369 reg = <0x550000e0 0x8>;
376 reg = <0x550000e8 0x8>;
383 reg = <0x550000f0 0x8>;
390 reg = <0x550000f8 0x8>;
397 reg = <0x55000100 0x8>;
404 reg = <0x55000108 0x8>;
412 reg = <0x58780000 0x80>;
414 #size-cells = <0>;
415 interrupts = <0 41 4>;
417 pinctrl-0 = <&pinctrl_i2c0>;
425 reg = <0x58781000 0x80>;
427 #size-cells = <0>;
428 interrupts = <0 42 4>;
430 pinctrl-0 = <&pinctrl_i2c1>;
438 reg = <0x58782000 0x80>;
440 #size-cells = <0>;
441 interrupts = <0 43 4>;
443 pinctrl-0 = <&pinctrl_i2c2>;
451 reg = <0x58783000 0x80>;
453 #size-cells = <0>;
454 interrupts = <0 44 4>;
456 pinctrl-0 = <&pinctrl_i2c3>;
466 reg = <0x58785000 0x80>;
468 #size-cells = <0>;
469 interrupts = <0 25 4>;
477 reg = <0x58786000 0x80>;
479 #size-cells = <0>;
480 interrupts = <0 26 4>;
488 reg = <0x58c00000 0x400>;
492 pinctrl-0 = <&pinctrl_system_bus>;
497 reg = <0x59801000 0x400>;
503 reg = <0x59810000 0x400>;
520 reg = <0x59820000 0x200>;
536 reg = <0x5f800000 0x2000>;
547 reg = <0x5fc20000 0x200>;
554 reg = <0x60000200 0x20>;
555 interrupts = <1 11 0x304>;
561 reg = <0x60000600 0x20>;
562 interrupts = <1 13 0x304>;
568 reg = <0x60001000 0x1000>,
569 <0x60000100 0x100>;
577 reg = <0x61840000 0x10000>;
593 reg = <0x65b00000 0x1000>;
598 pinctrl-0 = <&pinctrl_usb0>;
601 reg = <0x65a00000 0x10000>;
602 interrupts = <0 134 4>;
611 reg = <0x65d00000 0x1000>;
616 pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb2>;
619 reg = <0x65c00000 0x10000>;
620 interrupts = <0 137 4>;
630 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
631 interrupts = <0 65 4>;
633 pinctrl-0 = <&pinctrl_nand2cs>;
640 reg = <0x68400000 0x800>;
641 interrupts = <0 78 4>;
643 pinctrl-0 = <&pinctrl_emmc>;
657 reg = <0x68800000 0x800>;
658 interrupts = <0 76 4>;
660 pinctrl-0 = <&pinctrl_sd>;
662 clocks = <&sd_clk 0>;
664 resets = <&sd_rst 0>;