Lines Matching +full:0 +full:x54006800
17 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
65 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
66 <0x506c0000 0x400>;
67 interrupts = <0 174 4>, <0 175 4>;
78 reg = <0x54006800 0x40>;
79 interrupts = <0 33 4>;
81 pinctrl-0 = <&pinctrl_uart0>;
82 clocks = <&peri_clk 0>;
89 reg = <0x54006900 0x40>;
90 interrupts = <0 35 4>;
92 pinctrl-0 = <&pinctrl_uart1>;
100 reg = <0x54006a00 0x40>;
101 interrupts = <0 37 4>;
103 pinctrl-0 = <&pinctrl_uart2>;
111 reg = <0x54006b00 0x40>;
112 interrupts = <0 177 4>;
114 pinctrl-0 = <&pinctrl_uart3>;
121 reg = <0x55000008 0x8>;
128 reg = <0x55000010 0x8>;
135 reg = <0x55000018 0x8>;
142 reg = <0x55000020 0x8>;
149 reg = <0x55000028 0x8>;
156 reg = <0x55000030 0x8>;
163 reg = <0x55000038 0x8>;
170 reg = <0x55000040 0x8>;
177 reg = <0x55000048 0x8>;
184 reg = <0x55000050 0x8>;
191 reg = <0x55000058 0x8>;
198 reg = <0x55000060 0x8>;
205 reg = <0x55000068 0x8>;
212 reg = <0x55000070 0x8>;
219 reg = <0x55000078 0x8>;
226 reg = <0x550000a0 0x8>;
233 reg = <0x550000a8 0x8>;
240 reg = <0x550000b0 0x8>;
247 reg = <0x550000b8 0x8>;
254 reg = <0x550000c0 0x8>;
261 reg = <0x550000c8 0x8>;
268 reg = <0x550000d0 0x8>;
275 reg = <0x550000d8 0x8>;
282 reg = <0x550000e0 0x8>;
289 reg = <0x550000e8 0x8>;
296 reg = <0x550000f0 0x8>;
303 reg = <0x550000f8 0x8>;
310 reg = <0x55000100 0x8>;
317 reg = <0x55000108 0x8>;
325 reg = <0x58780000 0x80>;
327 #size-cells = <0>;
328 interrupts = <0 41 4>;
330 pinctrl-0 = <&pinctrl_i2c0>;
338 reg = <0x58781000 0x80>;
340 #size-cells = <0>;
341 interrupts = <0 42 4>;
343 pinctrl-0 = <&pinctrl_i2c1>;
351 reg = <0x58782000 0x80>;
353 #size-cells = <0>;
354 interrupts = <0 43 4>;
356 pinctrl-0 = <&pinctrl_i2c2>;
364 reg = <0x58783000 0x80>;
366 #size-cells = <0>;
367 interrupts = <0 44 4>;
369 pinctrl-0 = <&pinctrl_i2c3>;
379 reg = <0x58785000 0x80>;
381 #size-cells = <0>;
382 interrupts = <0 25 4>;
390 reg = <0x58786000 0x80>;
392 #size-cells = <0>;
393 interrupts = <0 26 4>;
401 reg = <0x58c00000 0x400>;
405 pinctrl-0 = <&pinctrl_system_bus>;
410 reg = <0x59801000 0x400>;
416 reg = <0x59810000 0x800>;
433 reg = <0x59820000 0x200>;
449 reg = <0x5a400000 0x200>;
450 interrupts = <0 76 4>;
452 pinctrl-0 = <&pinctrl_sd>;
454 clocks = <&mio_clk 0>;
456 resets = <&mio_rst 0>, <&mio_rst 3>;
467 reg = <0x5a500000 0x200>;
468 interrupts = <0 78 4>;
470 pinctrl-0 = <&pinctrl_emmc>;
484 reg = <0x5a600000 0x200>;
485 interrupts = <0 85 4>;
487 pinctrl-0 = <&pinctrl_sd1>;
501 reg = <0x5a800100 0x100>;
502 interrupts = <0 80 4>;
504 pinctrl-0 = <&pinctrl_usb2>;
513 reg = <0x5a810100 0x100>;
514 interrupts = <0 81 4>;
516 pinctrl-0 = <&pinctrl_usb3>;
525 reg = <0x5f800000 0x2000>;
536 reg = <0x5fc20000 0x200>;
543 reg = <0x60000200 0x20>;
544 interrupts = <1 11 0x304>;
550 reg = <0x60000600 0x20>;
551 interrupts = <1 13 0x304>;
557 reg = <0x60001000 0x1000>,
558 <0x60000100 0x100>;
566 reg = <0x61840000 0x10000>;
582 reg = <0x65b00000 0x1000>;
587 pinctrl-0 = <&pinctrl_usb0>;
590 reg = <0x65a00000 0x10000>;
591 interrupts = <0 134 4>;
600 reg = <0x65d00000 0x1000>;
605 pinctrl-0 = <&pinctrl_usb1>;
608 reg = <0x65c00000 0x10000>;
609 interrupts = <0 137 4>;
619 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
620 interrupts = <0 65 4>;
622 pinctrl-0 = <&pinctrl_nand>;