arm/dts/sun8i-v3s.dtsi

4  * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
44 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/pinctrl/sun4i-a10.h>
49 	#address-cells = <1>;
50 	#size-cells = <1>;
51 	interrupt-parent = <&gic>;
54 		#address-cells = <1>;
55 		#size-cells = <0>;
58 			compatible = "arm,cortex-a7";
61 			clocks = <&ccu CLK_CPU>;
66 		compatible = "arm,armv7-timer";
74 		#address-cells = <1>;
75 		#size-cells = <1>;
79 			#clock-cells = <0>;
80 			compatible = "fixed-clock";
81 			clock-frequency = <24000000>;
82 			clock-output-names = "osc24M";
86 			#clock-cells = <0>;
87 			compatible = "fixed-clock";
88 			clock-frequency = <32768>;
89 			clock-output-names = "osc32k";
94 		compatible = "simple-bus";
95 		#address-cells = <1>;
96 		#size-cells = <1>;
100 			compatible = "allwinner,sun7i-a20-mmc";
102 			clocks = <&ccu CLK_BUS_MMC0>,
103 				 <&ccu CLK_MMC0>,
104 				 <&ccu CLK_MMC0_OUTPUT>,
105 				 <&ccu CLK_MMC0_SAMPLE>;
106 			clock-names = "ahb",
110 			resets = <&ccu RST_BUS_MMC0>;
111 			reset-names = "ahb";
114 			#address-cells = <1>;
115 			#size-cells = <0>;
119 			compatible = "allwinner,sun7i-a20-mmc";
121 			clocks = <&ccu CLK_BUS_MMC1>,
122 				 <&ccu CLK_MMC1>,
123 				 <&ccu CLK_MMC1_OUTPUT>,
124 				 <&ccu CLK_MMC1_SAMPLE>;
125 			clock-names = "ahb",
129 			resets = <&ccu RST_BUS_MMC1>;
130 			reset-names = "ahb";
133 			#address-cells = <1>;
134 			#size-cells = <0>;
138 			compatible = "allwinner,sun7i-a20-mmc";
140 			clocks = <&ccu CLK_BUS_MMC2>,
141 				 <&ccu CLK_MMC2>,
142 				 <&ccu CLK_MMC2_OUTPUT>,
143 				 <&ccu CLK_MMC2_SAMPLE>;
144 			clock-names = "ahb",
148 			resets = <&ccu RST_BUS_MMC2>;
149 			reset-names = "ahb";
152 			#address-cells = <1>;
153 			#size-cells = <0>;
157 			compatible = "allwinner,sun8i-h3-musb";
159 			clocks = <&ccu CLK_BUS_OTG>;
160 			resets = <&ccu RST_BUS_OTG>;
162 			interrupt-names = "mc";
164 			phy-names = "usb";
170 			compatible = "allwinner,sun8i-v3s-usb-phy";
173 			reg-names = "phy_ctrl",
175 			clocks = <&ccu CLK_USB_PHY0>;
176 			clock-names = "usb0_phy";
177 			resets = <&ccu RST_USB_PHY0>;
178 			reset-names = "usb0_reset";
180 			#phy-cells = <1>;
183 		ccu: clock@01c20000 {  label
184 			compatible = "allwinner,sun8i-v3s-ccu";
187 			clock-names = "hosc", "losc";
188 			#clock-cells = <1>;
189 			#reset-cells = <1>;
193 			compatible = "allwinner,sun6i-a31-rtc";
200 			compatible = "allwinner,sun8i-v3s-pinctrl";
204 			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
205 			clock-names = "apb", "hosc", "losc";
206 			gpio-controller;
207 			#gpio-cells = <3>;
208 			interrupt-controller;
209 			#interrupt-cells = <3>;
214 				bias-pull-up;
221 				drive-strength = <30>;
222 				bias-pull-up;
227 			compatible = "allwinner,sun4i-a10-timer";
235 			compatible = "allwinner,sun6i-a31-wdt";
241 			compatible = "snps,dw-apb-uart";
244 			reg-shift = <2>;
245 			reg-io-width = <4>;
246 			clocks = <&ccu CLK_BUS_UART0>;
247 			resets = <&ccu RST_BUS_UART0>;
252 			compatible = "snps,dw-apb-uart";
255 			reg-shift = <2>;
256 			reg-io-width = <4>;
257 			clocks = <&ccu CLK_BUS_UART1>;
258 			resets = <&ccu RST_BUS_UART1>;
263 			compatible = "snps,dw-apb-uart";
266 			reg-shift = <2>;
267 			reg-io-width = <4>;
268 			clocks = <&ccu CLK_BUS_UART2>;
269 			resets = <&ccu RST_BUS_UART2>;
273 		gic: interrupt-controller@01c81000 {
274 			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
279 			interrupt-controller;
280 			#interrupt-cells = <3>;