Lines Matching +full:sun4i +full:- +full:a10 +full:- +full:ccu
4 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun8i-h3-ccu.h>
46 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/pinctrl/sun4i-a10.h>
48 #include <dt-bindings/reset/sun8i-h3-ccu.h>
51 interrupt-parent = <&gic>;
58 #address-cells = <1>;
59 #size-cells = <0>;
62 compatible = "arm,cortex-a7";
68 compatible = "arm,cortex-a7";
74 compatible = "arm,cortex-a7";
80 compatible = "arm,cortex-a7";
87 compatible = "arm,armv7-timer";
95 #address-cells = <1>;
96 #size-cells = <1>;
100 #clock-cells = <0>;
101 compatible = "fixed-clock";
102 clock-frequency = <24000000>;
103 clock-output-names = "osc24M";
107 #clock-cells = <0>;
108 compatible = "fixed-clock";
109 clock-frequency = <32768>;
110 clock-output-names = "osc32k";
114 compatible = "fixed-factor-clock";
115 #clock-cells = <0>;
116 clock-div = <1>;
117 clock-mult = <1>;
119 clock-output-names = "apb0";
123 compatible = "allwinner,sun8i-h3-apb0-gates-clk",
124 "allwinner,sun4i-a10-gates-clk";
126 #clock-cells = <1>;
128 clock-indices = <0>, <1>;
129 clock-output-names = "apb0_pio", "apb0_ir";
133 compatible = "allwinner,sun4i-a10-mod0-clk";
135 #clock-cells = <0>;
137 clock-output-names = "ir";
142 compatible = "simple-bus";
143 #address-cells = <1>;
144 #size-cells = <1>;
148 compatible = "allwinner,sun8i-h3-syscon","syscon";
152 dma: dma-controller@01c02000 {
153 compatible = "allwinner,sun8i-h3-dma";
156 clocks = <&ccu CLK_BUS_DMA>;
157 resets = <&ccu RST_BUS_DMA>;
158 #dma-cells = <1>;
162 compatible = "allwinner,sun7i-a20-mmc",
163 "allwinner,sun5i-a13-mmc";
165 clocks = <&ccu CLK_BUS_MMC0>,
166 <&ccu CLK_MMC0>,
167 <&ccu CLK_MMC0_OUTPUT>,
168 <&ccu CLK_MMC0_SAMPLE>;
169 clock-names = "ahb",
173 resets = <&ccu RST_BUS_MMC0>;
174 reset-names = "ahb";
177 #address-cells = <1>;
178 #size-cells = <0>;
182 compatible = "allwinner,sun7i-a20-mmc",
183 "allwinner,sun5i-a13-mmc";
185 clocks = <&ccu CLK_BUS_MMC1>,
186 <&ccu CLK_MMC1>,
187 <&ccu CLK_MMC1_OUTPUT>,
188 <&ccu CLK_MMC1_SAMPLE>;
189 clock-names = "ahb",
193 resets = <&ccu RST_BUS_MMC1>;
194 reset-names = "ahb";
197 #address-cells = <1>;
198 #size-cells = <0>;
202 compatible = "allwinner,sun7i-a20-mmc",
203 "allwinner,sun5i-a13-mmc";
205 clocks = <&ccu CLK_BUS_MMC2>,
206 <&ccu CLK_MMC2>,
207 <&ccu CLK_MMC2_OUTPUT>,
208 <&ccu CLK_MMC2_SAMPLE>;
209 clock-names = "ahb",
213 resets = <&ccu RST_BUS_MMC2>;
214 reset-names = "ahb";
217 #address-cells = <1>;
218 #size-cells = <0>;
222 compatible = "allwinner,sun8i-h3-usb-phy";
228 reg-names = "phy_ctrl",
233 clocks = <&ccu CLK_USB_PHY0>,
234 <&ccu CLK_USB_PHY1>,
235 <&ccu CLK_USB_PHY2>,
236 <&ccu CLK_USB_PHY3>;
237 clock-names = "usb0_phy",
241 resets = <&ccu RST_USB_PHY0>,
242 <&ccu RST_USB_PHY1>,
243 <&ccu RST_USB_PHY2>,
244 <&ccu RST_USB_PHY3>;
245 reset-names = "usb0_reset",
250 #phy-cells = <1>;
254 compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
257 clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>;
258 resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>;
260 phy-names = "usb";
265 compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
268 clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>,
269 <&ccu CLK_USB_OHCI1>;
270 resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>;
272 phy-names = "usb";
277 compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
280 clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>;
281 resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>;
283 phy-names = "usb";
288 compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
291 clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>,
292 <&ccu CLK_USB_OHCI2>;
293 resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>;
295 phy-names = "usb";
300 compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
303 clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>;
304 resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>;
306 phy-names = "usb";
311 compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
314 clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>,
315 <&ccu CLK_USB_OHCI3>;
316 resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>;
318 phy-names = "usb";
322 ccu: clock@01c20000 { label
323 compatible = "allwinner,sun8i-h3-ccu";
326 clock-names = "hosc", "losc";
327 #clock-cells = <1>;
328 #reset-cells = <1>;
332 compatible = "allwinner,sun8i-h3-pinctrl";
336 clocks = <&ccu CLK_BUS_PIO>;
337 gpio-controller;
338 #gpio-cells = <3>;
339 interrupt-controller;
340 #interrupt-cells = <3>;
402 compatible = "allwinner,sun4i-a10-timer";
410 compatible = "allwinner,sun6i-a31-wdt";
416 compatible = "snps,dw-apb-uart";
419 reg-shift = <2>;
420 reg-io-width = <4>;
421 clocks = <&ccu CLK_BUS_UART0>;
422 resets = <&ccu RST_BUS_UART0>;
424 dma-names = "rx", "tx";
429 compatible = "snps,dw-apb-uart";
432 reg-shift = <2>;
433 reg-io-width = <4>;
434 clocks = <&ccu CLK_BUS_UART1>;
435 resets = <&ccu RST_BUS_UART1>;
437 dma-names = "rx", "tx";
442 compatible = "snps,dw-apb-uart";
445 reg-shift = <2>;
446 reg-io-width = <4>;
447 clocks = <&ccu CLK_BUS_UART2>;
448 resets = <&ccu RST_BUS_UART2>;
450 dma-names = "rx", "tx";
455 compatible = "snps,dw-apb-uart";
458 reg-shift = <2>;
459 reg-io-width = <4>;
460 clocks = <&ccu CLK_BUS_UART3>;
461 resets = <&ccu RST_BUS_UART3>;
463 dma-names = "rx", "tx";
468 compatible = "allwinner,sun8i-h3-emac";
470 reg-names = "emac", "syscon";
472 resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>;
473 reset-names = "ahb", "ephy";
474 clocks = <&ccu CLK_BUS_EMAC>, <&ccu CLK_BUS_EPHY>;
475 clock-names = "ahb", "ephy";
476 #address-cells = <1>;
477 #size-cells = <0>;
481 gic: interrupt-controller@01c81000 {
482 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
487 interrupt-controller;
488 #interrupt-cells = <3>;
493 compatible = "allwinner,sun6i-a31-rtc";
501 compatible = "allwinner,sun6i-a31-clock-reset";
502 #reset-cells = <1>;
506 compatible = "allwinner,sun5i-a13-ir";
508 clock-names = "apb", "ir";
516 compatible = "allwinner,sun8i-h3-r-pinctrl";
521 gpio-controller;
522 #gpio-cells = <3>;
523 interrupt-controller;
524 #interrupt-cells = <3>;