arm/dts/sun7i-a20.dtsi

62 		#address-cells = <1>;
63 		#size-cells = <1>;
76 		framebuffer@1 {
99 		#address-cells = <1>;
123 		cpu@1 {
126 			reg = <1>;
181 		#address-cells = <1>;
182 		#size-cells = <1>;
197 			clock-mult = <1>;
218 			#clock-cells = <1>;
222 			clock-output-names = "pll2-1x", "pll2-2x",
238 			clock-div = <1>;
252 			#clock-cells = <1>;
260 			#clock-cells = <1>;
280 			clock-div = <1>;
297 			clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll6 1>;
313 			clocks = <&axi>, <&pll6 3>, <&pll6 1>;
324 			#clock-cells = <1>;
328 			clock-indices = <0>, <1>,
365 			#clock-cells = <1>;
369 			clock-indices = <0>, <1>,
383 			clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
388 			#clock-cells = <1>;
392 			clock-indices = <0>, <1>,
410 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
418 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
423 			#clock-cells = <1>;
426 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
433 			#clock-cells = <1>;
436 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
443 			#clock-cells = <1>;
446 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
453 			#clock-cells = <1>;
456 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
466 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
474 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
482 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
490 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
498 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
506 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
514 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
522 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
568 			#clock-cells = <1>;
569 			#reset-cells = <1>;
572 			clocks = <&pll6 1>;
581 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
608 			#clock-cells = <1>;
613 					<1>, <2>,
637 			clocks = <&pll3>, <&pll7>, <&pll5 1>;
646 			clocks = <&pll3>, <&pll7>, <&pll5 1>;
655 			clocks = <&pll3>, <&pll7>, <&pll5 1>;
664 			clocks = <&pll3>, <&pll7>, <&pll5 1>;
670 			#reset-cells = <1>;
680 			#reset-cells = <1>;
727 			clocks = <&osc24M>, <&pll6 2>, <&pll5 1>;
765 		osc24M_32k: clk@1 {
769 			clock-mult = <1>;
793 		#address-cells = <1>;
794 		#size-cells = <1>;
800 			#address-cells = <1>;
801 			#size-cells = <1>;
807 				#address-cells = <1>;
808 				#size-cells = <1>;
821 				#address-cells = <1>;
822 				#size-cells = <1>;
858 			#address-cells = <1>;
872 			#address-cells = <1>;
886 			#address-cells = <1>;
895 			allwinner,sram = <&emac_sram 1>;
903 			#address-cells = <1>;
913 				 <&mmc0_clk 1>,
921 			#address-cells = <1>;
931 				 <&mmc1_clk 1>,
939 			#address-cells = <1>;
949 				 <&mmc2_clk 1>,
957 			#address-cells = <1>;
967 				 <&mmc3_clk 1>,
975 			#address-cells = <1>;
988 			allwinner,sram = <&otg_sram 1>;
993 			#phy-cells = <1>;
999 			resets = <&usb_clk 0>, <&usb_clk 1>, <&usb_clk 2>;
1008 			clocks = <&ahb_gates 1>;
1009 			phys = <&usbphy 1>;
1019 			phys = <&usbphy 1>;
1042 			#address-cells = <1>;
1084 			#address-cells = <1>;
1184 			ir0_tx_pins_a: ir0@1 {
1198 			ir1_tx_pins_a: ir1@1 {
1313 			spi2_pins_b: spi2@1 {
1327 			spi2_cs0_pins_b: spi2_cs0@1 {
1355 			uart3_pins_b: uart3@1 {
1369 			uart4_pins_b: uart4@1 {
1434 			clocks = <&apb0_gates 1>, <&spdif_clk>;
1493 		codec: codec@01c22c00 {
1534 			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
1618 			#address-cells = <1>;
1627 			clocks = <&apb1_gates 1>;
1629 			#address-cells = <1>;
1640 			#address-cells = <1>;
1651 			#address-cells = <1>;
1662 			#address-cells = <1>;
1677 			#address-cells = <1>;