arm/dts/sun6i-a31.dtsi

4  * Maxime Ripard <maxime.ripard@free-electrons.com>
6  * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
48 #include <dt-bindings/thermal/thermal.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 	interrupt-parent = <&gic>;
60 		#address-cells = <1>;
61 		#size-cells = <1>;
65 			compatible = "allwinner,simple-framebuffer",
66 				     "simple-framebuffer";
67 			allwinner,pipeline = "de_be0-lcd0-hdmi";
73 			compatible = "allwinner,simple-framebuffer",
74 				     "simple-framebuffer";
75 			allwinner,pipeline = "de_be0-lcd0";
82 		compatible = "arm,armv7-timer";
87 		clock-frequency = <24000000>;
88 		arm,cpu-registers-not-fw-configured;
92 		enable-method = "allwinner,sun6i-a31";
93 		#address-cells = <1>;
94 		#size-cells = <0>;
97 			compatible = "arm,cortex-a7";
101 			clock-latency = <244144>; /* 8 32k periods */
102 			operating-points = <
109 			#cooling-cells = <2>;
110 			cooling-min-level = <0>;
111 			cooling-max-level = <3>;
115 			compatible = "arm,cortex-a7";
121 			compatible = "arm,cortex-a7";
127 			compatible = "arm,cortex-a7";
133 	thermal-zones {
136 			polling-delay-passive = <250>;
137 			polling-delay = <1000>;
138 			thermal-sensors = <&rtp>;
140 			cooling-maps {
143 					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
170 		compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu";
178 		#address-cells = <1>;
179 		#size-cells = <1>;
183 			#clock-cells = <0>;
184 			compatible = "fixed-clock";
185 			clock-frequency = <24000000>;
189 			#clock-cells = <0>;
190 			compatible = "fixed-clock";
191 			clock-frequency = <32768>;
192 			clock-output-names = "osc32k";
196 			#clock-cells = <0>;
197 			compatible = "allwinner,sun6i-a31-pll1-clk";
200 			clock-output-names = "pll1";
204 			#clock-cells = <1>;
205 			compatible = "allwinner,sun6i-a31-pll6-clk";
208 			clock-output-names = "pll6", "pll6x2";
212 			#clock-cells = <0>;
213 			compatible = "allwinner,sun4i-a10-cpu-clk";
223 			clock-output-names = "cpu";
227 			#clock-cells = <0>;
228 			compatible = "allwinner,sun4i-a10-axi-clk";
231 			clock-output-names = "axi";
235 			#clock-cells = <0>;
236 			compatible = "allwinner,sun6i-a31-ahb1-clk";
239 			clock-output-names = "ahb1";
242 			 * Clock AHB1 from PLL6, instead of CPU/AXI which
246 			assigned-clocks = <&ahb1>;
247 			assigned-clock-parents = <&pll6 0>;
251 			#clock-cells = <1>;
252 			compatible = "allwinner,sun6i-a31-ahb1-gates-clk";
255 			clock-indices = <1>, <5>,
269 			clock-output-names = "ahb1_mipidsi", "ahb1_ss",
286 			#clock-cells = <0>;
287 			compatible = "allwinner,sun4i-a10-apb0-clk";
290 			clock-output-names = "apb1";
294 			#clock-cells = <1>;
295 			compatible = "allwinner,sun6i-a31-apb1-gates-clk";
298 			clock-indices = <0>, <4>,
301 			clock-output-names = "apb1_codec", "apb1_digital_mic",
307 			#clock-cells = <0>;
308 			compatible = "allwinner,sun4i-a10-apb1-clk";
311 			clock-output-names = "apb2";
315 			#clock-cells = <1>;
316 			compatible = "allwinner,sun6i-a31-apb2-gates-clk";
319 			clock-indices = <0>, <1>,
323 			clock-output-names = "apb2_i2c0", "apb2_i2c1",
331 			#clock-cells = <1>;
332 			compatible = "allwinner,sun4i-a10-mmc-clk";
335 			clock-output-names = "mmc0",
341 			#clock-cells = <1>;
342 			compatible = "allwinner,sun4i-a10-mmc-clk";
345 			clock-output-names = "mmc1",
351 			#clock-cells = <1>;
352 			compatible = "allwinner,sun4i-a10-mmc-clk";
355 			clock-output-names = "mmc2",
361 			#clock-cells = <1>;
362 			compatible = "allwinner,sun4i-a10-mmc-clk";
365 			clock-output-names = "mmc3",
371 			#clock-cells = <0>;
372 			compatible = "allwinner,sun4i-a10-mod0-clk";
375 			clock-output-names = "ss";
379 			#clock-cells = <0>;
380 			compatible = "allwinner,sun4i-a10-mod0-clk";
383 			clock-output-names = "spi0";
387 			#clock-cells = <0>;
388 			compatible = "allwinner,sun4i-a10-mod0-clk";
391 			clock-output-names = "spi1";
395 			#clock-cells = <0>;
396 			compatible = "allwinner,sun4i-a10-mod0-clk";
399 			clock-output-names = "spi2";
403 			#clock-cells = <0>;
404 			compatible = "allwinner,sun4i-a10-mod0-clk";
407 			clock-output-names = "spi3";
411 			#clock-cells = <1>;
412 			#reset-cells = <1>;
413 			compatible = "allwinner,sun6i-a31-usb-clk";
416 			clock-indices = <8>, <9>, <10>,
419 			clock-output-names = "usb_phy0", "usb_phy1", "usb_phy2",
426 		 * used in the gmac_tx clock. The gmac driver will
428 		 * mode, using clk_set_rate auto-reparenting.
430 		 * The actual TX clock rate is not controlled by the
431 		 * gmac_tx clock.
434 			#clock-cells = <0>;
435 			compatible = "fixed-clock";
436 			clock-frequency = <25000000>;
437 			clock-output-names = "mii_phy_tx";
441 			#clock-cells = <0>;
442 			compatible = "fixed-clock";
443 			clock-frequency = <125000000>;
444 			clock-output-names = "gmac_int_tx";
448 			#clock-cells = <0>;
449 			compatible = "allwinner,sun7i-a20-gmac-clk";
452 			clock-output-names = "gmac_tx";
457 		compatible = "simple-bus";
458 		#address-cells = <1>;
459 		#size-cells = <1>;
462 		dma: dma-controller@01c02000 {
463 			compatible = "allwinner,sun6i-a31-dma";
468 			#dma-cells = <1>;
472 			compatible = "allwinner,sun7i-a20-mmc",
473 				     "allwinner,sun5i-a13-mmc";
479 			clock-names = "ahb",
481 				      "output",
484 			reset-names = "ahb";
487 			#address-cells = <1>;
488 			#size-cells = <0>;
492 			compatible = "allwinner,sun7i-a20-mmc",
493 				     "allwinner,sun5i-a13-mmc";
499 			clock-names = "ahb",
501 				      "output",
504 			reset-names = "ahb";
507 			#address-cells = <1>;
508 			#size-cells = <0>;
512 			compatible = "allwinner,sun7i-a20-mmc",
513 				     "allwinner,sun5i-a13-mmc";
519 			clock-names = "ahb",
521 				      "output",
524 			reset-names = "ahb";
527 			#address-cells = <1>;
528 			#size-cells = <0>;
532 			compatible = "allwinner,sun7i-a20-mmc",
533 				     "allwinner,sun5i-a13-mmc";
539 			clock-names = "ahb",
541 				      "output",
544 			reset-names = "ahb";
547 			#address-cells = <1>;
548 			#size-cells = <0>;
552 			compatible = "allwinner,sun6i-a31-musb";
557 			interrupt-names = "mc";
559 			phy-names = "usb";
565 			compatible = "allwinner,sun6i-a31-usb-phy";
569 			reg-names = "phy_ctrl",
575 			clock-names = "usb0_phy",
581 			reset-names = "usb0_reset",
585 			#phy-cells = <1>;
589 			compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
595 			phy-names = "usb";
600 			compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
606 			phy-names = "usb";
611 			compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
617 			phy-names = "usb";
622 			compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
628 			phy-names = "usb";
633 			compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
642 			compatible = "allwinner,sun6i-a31-pinctrl";
649 			gpio-controller;
650 			interrupt-controller;
651 			#interrupt-cells = <3>;
652 			#gpio-cells = <3>;
770 			#reset-cells = <1>;
771 			compatible = "allwinner,sun6i-a31-ahb1-reset";
776 			#reset-cells = <1>;
777 			compatible = "allwinner,sun6i-a31-clock-reset";
782 			#reset-cells = <1>;
783 			compatible = "allwinner,sun6i-a31-clock-reset";
788 			compatible = "allwinner,sun4i-a10-timer";
799 			compatible = "allwinner,sun6i-a31-wdt";
804 			compatible = "allwinner,sun4i-a10-lradc-keys";
811 			compatible = "allwinner,sun6i-a31-ts";
814 			#thermal-sensor-cells = <0>;
818 			compatible = "snps,dw-apb-uart";
821 			reg-shift = <2>;
822 			reg-io-width = <4>;
826 			dma-names = "rx", "tx";
831 			compatible = "snps,dw-apb-uart";
834 			reg-shift = <2>;
835 			reg-io-width = <4>;
839 			dma-names = "rx", "tx";
844 			compatible = "snps,dw-apb-uart";
847 			reg-shift = <2>;
848 			reg-io-width = <4>;
852 			dma-names = "rx", "tx";
857 			compatible = "snps,dw-apb-uart";
860 			reg-shift = <2>;
861 			reg-io-width = <4>;
865 			dma-names = "rx", "tx";
870 			compatible = "snps,dw-apb-uart";
873 			reg-shift = <2>;
874 			reg-io-width = <4>;
878 			dma-names = "rx", "tx";
883 			compatible = "snps,dw-apb-uart";
886 			reg-shift = <2>;
887 			reg-io-width = <4>;
891 			dma-names = "rx", "tx";
896 			compatible = "allwinner,sun6i-a31-i2c";
902 			#address-cells = <1>;
903 			#size-cells = <0>;
907 			compatible = "allwinner,sun6i-a31-i2c";
913 			#address-cells = <1>;
914 			#size-cells = <0>;
918 			compatible = "allwinner,sun6i-a31-i2c";
924 			#address-cells = <1>;
925 			#size-cells = <0>;
929 			compatible = "allwinner,sun6i-a31-i2c";
935 			#address-cells = <1>;
936 			#size-cells = <0>;
940 			compatible = "allwinner,sun7i-a20-gmac";
943 			interrupt-names = "macirq";
945 			clock-names = "stmmaceth", "allwinner_gmac_tx";
947 			reset-names = "stmmaceth";
949 			snps,fixed-burst;
952 			#address-cells = <1>;
953 			#size-cells = <0>;
956 		crypto: crypto-engine@01c15000 {
957 			compatible = "allwinner,sun4i-a10-crypto";
961 			clock-names = "ahb", "mod";
963 			reset-names = "ahb";
967 			compatible = "allwinner,sun6i-a31-hstimer",
968 				     "allwinner,sun7i-a20-hstimer";
979 			compatible = "allwinner,sun6i-a31-spi";
983 			clock-names = "ahb", "mod";
985 			dma-names = "rx", "tx";
991 			compatible = "allwinner,sun6i-a31-spi";
995 			clock-names = "ahb", "mod";
997 			dma-names = "rx", "tx";
1003 			compatible = "allwinner,sun6i-a31-spi";
1007 			clock-names = "ahb", "mod";
1009 			dma-names = "rx", "tx";
1015 			compatible = "allwinner,sun6i-a31-spi";
1019 			clock-names = "ahb", "mod";
1021 			dma-names = "rx", "tx";
1026 		gic: interrupt-controller@01c81000 {
1027 			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
1032 			interrupt-controller;
1033 			#interrupt-cells = <3>;
1038 			compatible = "allwinner,sun6i-a31-rtc";
1044 		nmi_intc: interrupt-controller@01f00c0c {
1045 			compatible = "allwinner,sun6i-a31-sc-nmi";
1046 			interrupt-controller;
1047 			#interrupt-cells = <2>;
1053 			compatible = "allwinner,sun6i-a31-prcm";
1057 				compatible = "allwinner,sun6i-a31-ar100-clk";
1058 				#clock-cells = <0>;
1061 				clock-output-names = "ar100";
1065 				compatible = "fixed-factor-clock";
1066 				#clock-cells = <0>;
1067 				clock-div = <1>;
1068 				clock-mult = <1>;
1070 				clock-output-names = "ahb0";
1074 				compatible = "allwinner,sun6i-a31-apb0-clk";
1075 				#clock-cells = <0>;
1077 				clock-output-names = "apb0";
1081 				compatible = "allwinner,sun6i-a31-apb0-gates-clk";
1082 				#clock-cells = <1>;
1084 				clock-output-names = "apb0_pio", "apb0_ir",
1091 				#clock-cells = <0>;
1092 				compatible = "allwinner,sun4i-a10-mod0-clk";
1094 				clock-output-names = "ir";
1098 				compatible = "allwinner,sun6i-a31-clock-reset";
1099 				#reset-cells = <1>;
1104 			compatible = "allwinner,sun6i-a31-cpuconfig";
1109 			compatible = "allwinner,sun5i-a13-ir";
1111 			clock-names = "apb", "ir";
1119 			compatible = "allwinner,sun6i-a31-r-pinctrl";
1125 			gpio-controller;
1126 			interrupt-controller;
1127 			#interrupt-cells = <3>;
1128 			#size-cells = <0>;
1129 			#gpio-cells = <3>;
1147 			compatible = "allwinner,sun6i-a31-p2wi";
1151 			clock-frequency = <100000>;
1153 			pinctrl-names = "default";
1154 			pinctrl-0 = <&p2wi_pins>;
1156 			#address-cells = <1>;
1157 			#size-cells = <0>;