Lines Matching full:pll6
157 pll6: clk@01c20028 { label
159 compatible = "allwinner,sun4i-a10-pll6-clk";
162 clock-output-names = "pll6_sata", "pll6_other", "pll6";
203 clocks = <&axi>, <&cpu>, <&pll6 1>;
206 * Use PLL6 as parent, instead of CPU/AXI
210 assigned-clock-parents = <&pll6 1>;
225 clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
242 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
250 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
258 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
268 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
278 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
288 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
296 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
304 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
312 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
320 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
328 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
337 clocks = <&pll6 1>;
353 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;