Lines Matching +full:clock +full:- +full:output +full:- +full:names
4 * Mylène Josserand <mylene.josserand@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun4i-a10-pll2.h>
46 #include <dt-bindings/dma/sun4i-a10.h>
47 #include <dt-bindings/pinctrl/sun4i-a10.h>
50 interrupt-parent = <&intc>;
51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
56 #size-cells = <0>;
60 compatible = "arm,cortex-a8";
67 #address-cells = <1>;
68 #size-cells = <1>;
72 * This is a dummy clock, to be used as placeholder on
73 * other mux clocks when a specific parent clock is not
78 #clock-cells = <0>;
79 compatible = "fixed-clock";
80 clock-frequency = <0>;
84 #clock-cells = <0>;
85 compatible = "allwinner,sun4i-a10-osc-clk";
87 clock-frequency = <24000000>;
88 clock-output-names = "osc24M";
91 osc3M: osc3M-clk {
92 compatible = "fixed-factor-clock";
93 #clock-cells = <0>;
94 clock-div = <8>;
95 clock-mult = <1>;
97 clock-output-names = "osc3M";
101 #clock-cells = <0>;
102 compatible = "fixed-clock";
103 clock-frequency = <32768>;
104 clock-output-names = "osc32k";
108 #clock-cells = <0>;
109 compatible = "allwinner,sun4i-a10-pll1-clk";
112 clock-output-names = "pll1";
116 #clock-cells = <1>;
117 compatible = "allwinner,sun5i-a13-pll2-clk";
120 clock-output-names = "pll2-1x", "pll2-2x",
121 "pll2-4x", "pll2-8x";
125 #clock-cells = <0>;
126 compatible = "allwinner,sun4i-a10-pll3-clk";
129 clock-output-names = "pll3";
132 pll3x2: pll3x2-clk {
133 compatible = "allwinner,sun4i-a10-pll3-2x-clk";
134 #clock-cells = <0>;
135 clock-div = <1>;
136 clock-mult = <2>;
138 clock-output-names = "pll3-2x";
142 #clock-cells = <0>;
143 compatible = "allwinner,sun4i-a10-pll1-clk";
146 clock-output-names = "pll4";
150 #clock-cells = <1>;
151 compatible = "allwinner,sun4i-a10-pll5-clk";
154 clock-output-names = "pll5_ddr", "pll5_other";
158 #clock-cells = <1>;
159 compatible = "allwinner,sun4i-a10-pll6-clk";
162 clock-output-names = "pll6_sata", "pll6_other", "pll6";
166 #clock-cells = <0>;
167 compatible = "allwinner,sun4i-a10-pll3-clk";
170 clock-output-names = "pll7";
173 pll7x2: pll7x2-clk {
174 compatible = "allwinner,sun4i-a10-pll3-2x-clk";
175 #clock-cells = <0>;
176 clock-div = <1>;
177 clock-mult = <2>;
179 clock-output-names = "pll7-2x";
184 #clock-cells = <0>;
185 compatible = "allwinner,sun4i-a10-cpu-clk";
188 clock-output-names = "cpu";
192 #clock-cells = <0>;
193 compatible = "allwinner,sun4i-a10-axi-clk";
196 clock-output-names = "axi";
200 #clock-cells = <0>;
201 compatible = "allwinner,sun5i-a13-ahb-clk";
204 clock-output-names = "ahb";
209 assigned-clocks = <&ahb>;
210 assigned-clock-parents = <&pll6 1>;
214 #clock-cells = <0>;
215 compatible = "allwinner,sun4i-a10-apb0-clk";
218 clock-output-names = "apb0";
222 #clock-cells = <0>;
223 compatible = "allwinner,sun4i-a10-apb1-clk";
226 clock-output-names = "apb1";
230 #clock-cells = <1>;
231 compatible = "allwinner,sun4i-a10-gates-clk";
234 clock-indices = <0>;
235 clock-output-names = "axi_dram";
239 #clock-cells = <1>;
240 compatible = "allwinner,sun5i-a13-ahb-gates-clk";
243 clock-indices = <0>, <1>,
253 clock-output-names = "ahb_usbotg", "ahb_ehci",
266 #clock-cells = <1>;
267 compatible = "allwinner,sun4i-a10-gates-clk";
270 clock-indices = <0>, <3>,
272 clock-output-names = "apb0_codec", "apb0_i2s0",
277 #clock-cells = <1>;
278 compatible = "allwinner,sun4i-a10-gates-clk";
281 clock-indices = <0>, <1>,
284 clock-output-names = "apb1_i2c0", "apb1_i2c1",
290 #clock-cells = <0>;
291 compatible = "allwinner,sun4i-a10-mod0-clk";
294 clock-output-names = "nand";
298 #clock-cells = <0>;
299 compatible = "allwinner,sun4i-a10-mod0-clk";
302 clock-output-names = "ms";
306 #clock-cells = <1>;
307 compatible = "allwinner,sun4i-a10-mmc-clk";
310 clock-output-names = "mmc0",
316 #clock-cells = <1>;
317 compatible = "allwinner,sun4i-a10-mmc-clk";
320 clock-output-names = "mmc1",
326 #clock-cells = <1>;
327 compatible = "allwinner,sun4i-a10-mmc-clk";
330 clock-output-names = "mmc2",
336 #clock-cells = <0>;
337 compatible = "allwinner,sun4i-a10-mod0-clk";
340 clock-output-names = "ts";
344 #clock-cells = <0>;
345 compatible = "allwinner,sun4i-a10-mod0-clk";
348 clock-output-names = "ss";
352 #clock-cells = <0>;
353 compatible = "allwinner,sun4i-a10-mod0-clk";
356 clock-output-names = "spi0";
360 #clock-cells = <0>;
361 compatible = "allwinner,sun4i-a10-mod0-clk";
364 clock-output-names = "spi1";
368 #clock-cells = <0>;
369 compatible = "allwinner,sun4i-a10-mod0-clk";
372 clock-output-names = "spi2";
376 #clock-cells = <0>;
377 compatible = "allwinner,sun4i-a10-mod0-clk";
380 clock-output-names = "ir0";
384 #clock-cells = <0>;
385 compatible = "allwinner,sun4i-a10-mod1-clk";
391 clock-output-names = "i2s0";
395 #clock-cells = <0>;
396 compatible = "allwinner,sun4i-a10-mod1-clk";
402 clock-output-names = "spdif";
406 #clock-cells = <1>;
407 #reset-cells = <1>;
408 compatible = "allwinner,sun5i-a13-usb-clk";
411 clock-output-names = "usb_ohci0", "usb_phy";
415 #clock-cells = <1>;
416 compatible = "nextthing,gr8-dram-gates-clk",
417 "allwinner,sun4i-a10-gates-clk";
420 clock-indices = <0>,
426 clock-output-names = "dram_ve",
435 #clock-cells = <0>;
436 #reset-cells = <0>;
437 compatible = "allwinner,sun4i-a10-display-clk";
440 clock-output-names = "de-be";
444 #clock-cells = <0>;
445 #reset-cells = <0>;
446 compatible = "allwinner,sun4i-a10-display-clk";
449 clock-output-names = "de-fe";
453 #clock-cells = <0>;
454 #reset-cells = <1>;
455 compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
458 clock-output-names = "tcon-ch0-sclk";
462 #clock-cells = <0>;
463 compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
466 clock-output-names = "tcon-ch1-sclk";
470 #clock-cells = <0>;
471 compatible = "allwinner,sun4i-a10-codec-clk";
474 clock-output-names = "codec";
478 #clock-cells = <0>;
479 compatible = "allwinner,sun5i-a13-mbus-clk";
482 clock-output-names = "mbus";
486 display-engine {
487 compatible = "allwinner,sun5i-a13-display-engine";
492 compatible = "simple-bus";
493 #address-cells = <1>;
494 #size-cells = <1>;
497 sram-controller@01c00000 {
498 compatible = "allwinner,sun4i-a10-sram-controller";
500 #address-cells = <1>;
501 #size-cells = <1>;
505 compatible = "mmio-sram";
507 #address-cells = <1>;
508 #size-cells = <1>;
513 compatible = "mmio-sram";
515 #address-cells = <1>;
516 #size-cells = <1>;
519 otg_sram: sram-section@0000 {
520 compatible = "allwinner,sun4i-a10-sram-d";
527 dma: dma-controller@01c02000 {
528 compatible = "allwinner,sun4i-a10-dma";
532 #dma-cells = <2>;
536 compatible = "allwinner,sun4i-a10-nand";
540 clock-names = "ahb", "mod";
542 dma-names = "rxtx";
544 #address-cells = <1>;
545 #size-cells = <0>;
549 compatible = "allwinner,sun4i-a10-spi";
553 clock-names = "ahb", "mod";
556 dma-names = "rx", "tx";
558 #address-cells = <1>;
559 #size-cells = <0>;
563 compatible = "allwinner,sun4i-a10-spi";
567 clock-names = "ahb", "mod";
570 dma-names = "rx", "tx";
572 #address-cells = <1>;
573 #size-cells = <0>;
576 tve0: tv-encoder@01c0a000 {
577 compatible = "allwinner,sun4i-a10-tv-encoder";
584 #address-cells = <1>;
585 #size-cells = <0>;
589 remote-endpoint = <&tcon0_out_tve0>;
594 tcon0: lcd-controller@01c0c000 {
595 compatible = "allwinner,sun5i-a13-tcon";
599 reset-names = "lcd";
603 clock-names = "ahb",
604 "tcon-ch0",
605 "tcon-ch1";
606 clock-output-names = "tcon-pixel-clock";
610 #address-cells = <1>;
611 #size-cells = <0>;
614 #address-cells = <1>;
615 #size-cells = <0>;
620 remote-endpoint = <&be0_out_tcon0>;
625 #address-cells = <1>;
626 #size-cells = <0>;
631 remote-endpoint = <&tve0_in_tcon0>;
638 compatible = "allwinner,sun5i-a13-mmc";
644 clock-names = "ahb",
646 "output",
650 #address-cells = <1>;
651 #size-cells = <0>;
655 compatible = "allwinner,sun5i-a13-mmc";
661 clock-names = "ahb",
663 "output",
667 #address-cells = <1>;
668 #size-cells = <0>;
672 compatible = "allwinner,sun5i-a13-mmc";
678 clock-names = "ahb",
680 "output",
684 #address-cells = <1>;
685 #size-cells = <0>;
689 compatible = "allwinner,sun4i-a10-musb";
693 interrupt-names = "mc";
695 phy-names = "usb";
704 #phy-cells = <1>;
705 compatible = "allwinner,sun5i-a13-usb-phy";
707 reg-names = "phy_ctrl", "pmu1";
709 clock-names = "usb_phy";
711 reset-names = "usb0_reset", "usb1_reset";
716 compatible = "allwinner,sun5i-a13-ehci", "generic-ehci";
721 phy-names = "usb";
726 compatible = "allwinner,sun5i-a13-ohci", "generic-ohci";
731 phy-names = "usb";
736 compatible = "allwinner,sun4i-a10-spi";
740 clock-names = "ahb", "mod";
743 dma-names = "rx", "tx";
745 #address-cells = <1>;
746 #size-cells = <0>;
749 intc: interrupt-controller@01c20400 {
750 compatible = "allwinner,sun4i-a10-ic";
752 interrupt-controller;
753 #interrupt-cells = <1>;
757 compatible = "nextthing,gr8-pinctrl";
761 gpio-controller;
762 interrupt-controller;
763 #interrupt-cells = <3>;
764 #gpio-cells = <3>;
787 i2s0_data_pins_a: i2s0-data@0 {
794 i2s0_mclk_pins_a: i2s0-mclk@0 {
808 lcd_rgb666_pins: lcd-rgb666@0 {
826 nand_pins_a: nand-base0@0 {
836 nand_cs0_pins_a: nand-cs@0 {
843 nand_rb0_pins_a: nand-rb@0 {
878 uart1_cts_rts_pins_a: uart1-cts-rts@0 {
892 uart2_cts_rts_pins_a: uart2-cts-rts@0 {
906 uart3_cts_rts_pins_a: uart3-cts-rts@0 {
915 compatible = "allwinner,sun5i-a10s-pwm";
918 #pwm-cells = <3>;
923 compatible = "allwinner,sun4i-a10-timer";
930 compatible = "allwinner,sun4i-a10-wdt";
935 #sound-dai-cells = <0>;
936 compatible = "allwinner,sun4i-a10-spdif";
940 clock-names = "apb", "spdif";
943 dma-names = "rx", "tx";
948 compatible = "allwinner,sun4i-a10-ir";
950 clock-names = "apb", "ir";
957 #sound-dai-cells = <0>;
958 compatible = "allwinner,sun4i-a10-i2s";
962 clock-names = "apb", "mod";
965 dma-names = "rx", "tx";
970 compatible = "allwinner,sun4i-a10-lradc-keys";
977 #sound-dai-cells = <0>;
978 compatible = "allwinner,sun4i-a10-codec";
982 clock-names = "apb", "codec";
985 dma-names = "rx", "tx";
990 compatible = "allwinner,sun5i-a13-ts";
993 #thermal-sensor-cells = <0>;
997 compatible = "snps,dw-apb-uart";
1000 reg-shift = <2>;
1001 reg-io-width = <4>;
1007 compatible = "snps,dw-apb-uart";
1010 reg-shift = <2>;
1011 reg-io-width = <4>;
1017 compatible = "snps,dw-apb-uart";
1020 reg-shift = <2>;
1021 reg-io-width = <4>;
1027 compatible = "allwinner,sun4i-a10-i2c";
1032 #address-cells = <1>;
1033 #size-cells = <0>;
1037 compatible = "allwinner,sun4i-a10-i2c";
1042 #address-cells = <1>;
1043 #size-cells = <0>;
1047 compatible = "allwinner,sun4i-a10-i2c";
1052 #address-cells = <1>;
1053 #size-cells = <0>;
1057 compatible = "allwinner,sun5i-a13-hstimer";
1063 fe0: display-frontend@01e00000 {
1064 compatible = "allwinner,sun5i-a13-display-frontend";
1069 clock-names = "ahb", "mod",
1075 #address-cells = <1>;
1076 #size-cells = <0>;
1079 #address-cells = <1>;
1080 #size-cells = <0>;
1085 remote-endpoint = <&be0_in_fe0>;
1091 be0: display-backend@01e60000 {
1092 compatible = "allwinner,sun5i-a13-display-backend";
1096 clock-names = "ahb", "mod",
1101 assigned-clocks = <&de_be_clk>;
1102 assigned-clock-rates = <300000000>;
1105 #address-cells = <1>;
1106 #size-cells = <0>;
1109 #address-cells = <1>;
1110 #size-cells = <0>;
1115 remote-endpoint = <&fe0_out_be0>;
1120 #address-cells = <1>;
1121 #size-cells = <0>;
1126 remote-endpoint = <&tcon0_in_be0>;