arm/dts/sun4i-a10.dtsi

60 		#address-cells = <1>;
61 		#size-cells = <1>;
74 		framebuffer@1 {
109 		#address-cells = <1>;
167 		#address-cells = <1>;
168 		#size-cells = <1>;
195 			clock-mult = <1>;
216 			#clock-cells = <1>;
220 			clock-output-names = "pll2-1x", "pll2-2x",
235 			clock-div = <1>;
250 			#clock-cells = <1>;
258 			#clock-cells = <1>;
276 			clock-div = <1>;
300 			#clock-cells = <1>;
317 			#clock-cells = <1>;
321 			clock-indices = <0>, <1>,
362 			#clock-cells = <1>;
366 			clock-indices = <0>, <1>,
380 			clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
385 			#clock-cells = <1>;
389 			clock-indices = <0>, <1>,
411 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
419 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
424 			#clock-cells = <1>;
427 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
434 			#clock-cells = <1>;
437 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
444 			#clock-cells = <1>;
447 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
454 			#clock-cells = <1>;
457 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
467 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
475 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
483 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
491 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
499 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
507 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
515 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
523 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
539 			#clock-cells = <1>;
540 			#reset-cells = <1>;
543 			clocks = <&pll6 1>;
552 			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
557 			#clock-cells = <1>;
562 					<1>, <2>,
586 			clocks = <&pll3>, <&pll7>, <&pll5 1>;
595 			clocks = <&pll3>, <&pll7>, <&pll5 1>;
604 			clocks = <&pll3>, <&pll7>, <&pll5 1>;
613 			clocks = <&pll3>, <&pll7>, <&pll5 1>;
620 			#reset-cells = <1>;
630 			#reset-cells = <1>;
676 		#address-cells = <1>;
677 		#size-cells = <1>;
683 			#address-cells = <1>;
684 			#size-cells = <1>;
690 				#address-cells = <1>;
691 				#size-cells = <1>;
704 				#address-cells = <1>;
705 				#size-cells = <1>;
733 			#address-cells = <1>;
747 			#address-cells = <1>;
761 			#address-cells = <1>;
770 			allwinner,sram = <&emac_sram 1>;
778 			#address-cells = <1>;
787 				 <&mmc0_clk 1>,
795 			#address-cells = <1>;
804 				 <&mmc1_clk 1>,
812 			#address-cells = <1>;
821 				 <&mmc2_clk 1>,
829 			#address-cells = <1>;
838 				 <&mmc3_clk 1>,
846 			#address-cells = <1>;
859 			allwinner,sram = <&otg_sram 1>;
864 			#phy-cells = <1>;
870 			resets = <&usb_clk 0>, <&usb_clk 1>, <&usb_clk 2>;
879 			clocks = <&ahb_gates 1>;
880 			phys = <&usbphy 1>;
890 			phys = <&usbphy 1>;
913 			#address-cells = <1>;
955 			#address-cells = <1>;
963 			#interrupt-cells = <1>;
1015 			ir0_tx_pins_a: ir0@1 {
1029 			ir1_tx_pins_a: ir1@1 {
1121 			spi2_pins_b: spi2@1 {
1135 			spi2_cs0_pins_b: spi2_cs0@1 {
1149 			uart0_pins_b: uart0@1 {
1164 		timer@01c20c00 {
1195 			clocks = <&apb0_gates 1>, <&spdif_clk>;
1256 			interrupts = <1>;
1339 			#address-cells = <1>;
1347 			clocks = <&apb1_gates 1>;
1349 			#address-cells = <1>;
1359 			#address-cells = <1>;