Lines Matching +full:0 +full:xffd04000
42 reg = <0x0 0x40000000>; /* 1GB */
47 #size-cells = <0>;
49 cpu@0 {
52 reg = <0>;
67 reg = <0xffffd000 0x1000>,
68 <0xffffc100 0x100>;
87 reg = <0xffda1000 0x1000>;
88 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>,
89 <0 84 IRQ_TYPE_LEVEL_HIGH>,
90 <0 85 IRQ_TYPE_LEVEL_HIGH>,
91 <0 86 IRQ_TYPE_LEVEL_HIGH>,
92 <0 87 IRQ_TYPE_LEVEL_HIGH>,
93 <0 88 IRQ_TYPE_LEVEL_HIGH>,
94 <0 89 IRQ_TYPE_LEVEL_HIGH>,
95 <0 90 IRQ_TYPE_LEVEL_HIGH>,
96 <0 91 IRQ_TYPE_LEVEL_HIGH>;
107 reg = <0xffd04000 0x1000>;
112 #size-cells = <0>;
115 #clock-cells = <0>;
120 #clock-cells = <0>;
125 #clock-cells = <0>;
130 #clock-cells = <0>;
136 #size-cells = <0>;
137 #clock-cells = <0>;
141 reg = <0x40>;
144 #clock-cells = <0>;
147 div-reg = <0x140 0 11>;
151 #clock-cells = <0>;
154 div-reg = <0x144 0 11>;
158 #clock-cells = <0>;
161 reg = <0x68>;
165 #clock-cells = <0>;
168 reg = <0x6C>;
172 #clock-cells = <0>;
175 reg = <0x70>;
179 #clock-cells = <0>;
182 reg = <0x74>;
186 #clock-cells = <0>;
189 reg = <0x78>;
193 #clock-cells = <0>;
196 reg = <0x7C>;
200 #clock-cells = <0>;
203 reg = <0x80>;
207 #clock-cells = <0>;
210 reg = <0x84>;
214 #clock-cells = <0>;
217 reg = <0x9C>;
223 #size-cells = <0>;
224 #clock-cells = <0>;
228 reg = <0xC0>;
231 #clock-cells = <0>;
234 div-reg = <0x140 16 11>;
238 #clock-cells = <0>;
241 div-reg = <0x144 16 11>;
245 #clock-cells = <0>;
248 reg = <0xE8>;
252 #clock-cells = <0>;
255 reg = <0xEC>;
259 #clock-cells = <0>;
262 reg = <0xF0>;
266 #clock-cells = <0>;
269 reg = <0xF4>;
273 #clock-cells = <0>;
276 reg = <0xF8>;
280 #clock-cells = <0>;
283 reg = <0xFC>;
287 #clock-cells = <0>;
290 reg = <0x100>;
294 #clock-cells = <0>;
297 reg = <0x104>;
302 #clock-cells = <0>;
307 reg = <0x60>;
311 #clock-cells = <0>;
316 reg = <0x64>;
320 #clock-cells = <0>;
325 reg = <0x104>;
329 #clock-cells = <0>;
335 reg = <0xF8>;
339 #clock-cells = <0>;
346 #clock-cells = <0>;
349 div-reg = <0xA8 0 2>;
350 clk-gate = <0x48 1>;
354 #clock-cells = <0>;
357 div-reg = <0xA8 8 2>;
358 clk-gate = <0x48 2>;
362 #clock-cells = <0>;
365 div-reg = <0xA8 16 2>;
366 clk-gate = <0x48 3>;
370 #clock-cells = <0>;
374 clk-gate = <0x48 0>;
378 #clock-cells = <0>;
381 clk-gate = <0xC8 5>;
382 clk-phase = <0 135>;
386 #clock-cells = <0>;
389 clk-gate = <0xC8 11>;
393 #clock-cells = <0>;
396 clk-gate = <0xC8 10>;
400 #clock-cells = <0>;
403 clk-gate = <0xC8 9>;
407 #clock-cells = <0>;
410 clk-gate = <0xC8 8>;
414 #clock-cells = <0>;
417 clk-gate = <0xC8 6>;
424 altr,sysmgr-syscon = <&sysmgr 0x44 0>;
425 reg = <0xff800000 0x2000>;
426 interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
443 altr,sysmgr-syscon = <&sysmgr 0x48 0>;
444 reg = <0xff802000 0x2000>;
445 interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>;
462 altr,sysmgr-syscon = <&sysmgr 0x4C 0>;
463 reg = <0xff804000 0x2000>;
464 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
479 #size-cells = <0>;
481 reg = <0xffc02900 0x100>;
484 porta: gpio-controller@0 {
489 reg = <0>;
492 interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
498 #size-cells = <0>;
500 reg = <0xffc02a00 0x100>;
503 portb: gpio-controller@0 {
508 reg = <0>;
511 interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
517 #size-cells = <0>;
519 reg = <0xffc02b00 0x100>;
522 portc: gpio-controller@0 {
527 reg = <0>;
530 interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
536 reg = <0xffd03000 0x100
537 0xffcfe400 0x20>;
545 #size-cells = <0>;
547 reg = <0xffc02200 0x100>;
548 interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
555 #size-cells = <0>;
557 reg = <0xffc02300 0x100>;
558 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
565 #size-cells = <0>;
567 reg = <0xffc02400 0x100>;
568 interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
575 #size-cells = <0>;
577 reg = <0xffc02500 0x100>;
578 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
585 #size-cells = <0>;
587 reg = <0xffc02600 0x100>;
588 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
593 sdr: sdr@0xffcfb100 {
595 reg = <0xffcfb100 0x80>;
601 #size-cells = <0>;
602 reg = <0xffda4000 0x100>;
603 interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>;
605 bus-num = <0>;
615 #size-cells = <0>;
616 reg = <0xffda5000 0x100>;
617 interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>;
619 bus-num = <0>;
628 reg = <0xfffff000 0x1000>;
629 interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
636 #size-cells = <0>;
638 reg = <0xff808000 0x1000>;
639 interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
640 fifo-depth = <0x400>;
649 reg = <0xffe00000 0x40000>;
657 interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>,
658 <0 0 IRQ_TYPE_LEVEL_HIGH>;
672 reg = <0xffd06010 0x4>;
673 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>,
679 reg = <0xff8c3000 0x400>;
686 reg = <0xff8c2c00 0x400>;
696 reg = <0xff8c0800 0x400>;
704 reg = <0xff8c0c00 0x400>;
712 reg = <0xff8c8000 0x400>;
720 reg = <0xff8c8800 0x400>;
729 #size-cells = <0>;
731 reg = <0xff809000 0x100>,
732 <0xffa00000 0x100000>;
733 interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
735 ext-decoder = <0>; /* external decoder */
746 reg = <0xffd05000 0x100>;
747 altr,modrst-offset = <0x20>;
752 reg = <0xffffc000 0x100>;
757 reg = <0xffd06000 0x300>;
758 cpu1-start-addr = <0xffd06230>;
764 reg = <0xffffc600 0x100>;
765 interrupts = <1 13 0xf04>;
771 interrupts = <0 115 IRQ_TYPE_LEVEL_HIGH>;
772 reg = <0xffc02700 0x100>;
779 interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>;
780 reg = <0xffc02800 0x100>;
787 interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH>;
788 reg = <0xffd00000 0x100>;
795 interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>;
796 reg = <0xffd01000 0x100>;
803 reg = <0xffc02000 0x100>;
804 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
813 reg = <0xffc02100 0x100>;
814 interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
821 usbphy0: usbphy@0 {
822 #phy-cells = <0>;
829 reg = <0xffb00000 0xffff>;
830 interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>;
842 reg = <0xffb40000 0xffff>;
843 interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>;
855 reg = <0xffd00200 0x100>;
856 interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>;
863 reg = <0xffd00300 0x100>;
864 interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;