Lines Matching +full:0 +full:xffd04000
30 #size-cells = <0>;
32 cpu@0 {
35 reg = <0>;
50 reg = <0xfffed000 0x1000>,
51 <0xfffec100 0x100>;
70 reg = <0xffe01000 0x1000>;
71 interrupts = <0 104 4>,
72 <0 105 4>,
73 <0 106 4>,
74 <0 107 4>,
75 <0 108 4>,
76 <0 109 4>,
77 <0 110 4>,
78 <0 111 4>;
89 reg = <0xffc00000 0x1000>;
90 interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;
97 reg = <0xffc01000 0x1000>;
98 interrupts = <0 135 4>, <0 136 4>, <0 137 4>, <0 138 4>;
105 reg = <0xffd04000 0x1000>;
109 #size-cells = <0>;
112 #clock-cells = <0>;
117 #clock-cells = <0>;
122 #clock-cells = <0>;
127 #clock-cells = <0>;
133 #size-cells = <0>;
134 #clock-cells = <0>;
137 reg = <0x40>;
140 #clock-cells = <0>;
143 div-reg = <0xe0 0 9>;
144 reg = <0x48>;
148 #clock-cells = <0>;
151 div-reg = <0xe4 0 9>;
152 reg = <0x4C>;
156 #clock-cells = <0>;
159 div-reg = <0xe8 0 9>;
160 reg = <0x50>;
164 #clock-cells = <0>;
167 reg = <0x54>;
171 #clock-cells = <0>;
174 reg = <0x58>;
178 #clock-cells = <0>;
181 reg = <0x5C>;
187 #size-cells = <0>;
188 #clock-cells = <0>;
191 reg = <0x80>;
194 #clock-cells = <0>;
197 reg = <0x88>;
201 #clock-cells = <0>;
204 reg = <0x8C>;
208 #clock-cells = <0>;
211 reg = <0x90>;
215 #clock-cells = <0>;
218 reg = <0x94>;
222 #clock-cells = <0>;
225 reg = <0x98>;
229 #clock-cells = <0>;
232 reg = <0x9C>;
238 #size-cells = <0>;
239 #clock-cells = <0>;
242 reg = <0xC0>;
245 #clock-cells = <0>;
248 reg = <0xC8>;
252 #clock-cells = <0>;
255 reg = <0xCC>;
259 #clock-cells = <0>;
262 reg = <0xD0>;
266 #clock-cells = <0>;
269 reg = <0xD4>;
274 #clock-cells = <0>;
281 #clock-cells = <0>;
288 #clock-cells = <0>;
291 clk-gate = <0x60 0>;
295 #clock-cells = <0>;
302 #clock-cells = <0>;
305 div-reg = <0x64 0 2>;
306 clk-gate = <0x60 1>;
310 #clock-cells = <0>;
313 div-reg = <0x64 2 2>;
317 #clock-cells = <0>;
320 div-reg = <0x64 4 3>;
321 clk-gate = <0x60 2>;
325 #clock-cells = <0>;
328 div-reg = <0x64 7 3>;
329 clk-gate = <0x60 3>;
333 #clock-cells = <0>;
336 div-reg = <0x68 0 2>;
337 clk-gate = <0x60 4>;
341 #clock-cells = <0>;
344 div-reg = <0x68 2 2>;
345 clk-gate = <0x60 5>;
349 #clock-cells = <0>;
352 div-reg = <0x6C 0 3>;
353 clk-gate = <0x60 6>;
357 #clock-cells = <0>;
360 clk-gate = <0x60 7>;
364 #clock-cells = <0>;
367 clk-gate = <0x60 8>;
371 #clock-cells = <0>;
374 clk-gate = <0x60 9>;
378 #clock-cells = <0>;
381 clk-gate = <0xa0 0>;
385 #clock-cells = <0>;
388 clk-gate = <0xa0 1>;
392 #clock-cells = <0>;
395 clk-gate = <0xa0 2>;
396 div-reg = <0xa4 0 3>;
400 #clock-cells = <0>;
403 clk-gate = <0xa0 3>;
404 div-reg = <0xa4 3 3>;
408 #clock-cells = <0>;
411 clk-gate = <0xa0 4>;
412 div-reg = <0xa4 6 3>;
416 #clock-cells = <0>;
419 clk-gate = <0xa0 5>;
420 div-reg = <0xa4 9 3>;
424 #clock-cells = <0>;
427 clk-gate = <0xa0 6>;
428 div-reg = <0xa8 0 24>;
432 #clock-cells = <0>;
435 clk-gate = <0xa0 7>;
439 #clock-cells = <0>;
442 clk-gate = <0xa0 8>;
443 clk-phase = <0 135>;
447 #clock-cells = <0>;
450 clk-gate = <0xa0 9>;
454 #clock-cells = <0>;
457 clk-gate = <0xa0 10>;
462 #clock-cells = <0>;
465 clk-gate = <0xa0 11>;
472 altr,sysmgr-syscon = <&sysmgr 0x60 0>;
473 reg = <0xff700000 0x2000>;
474 interrupts = <0 115 4>;
488 altr,sysmgr-syscon = <&sysmgr 0x60 2>;
489 reg = <0xff702000 0x2000>;
490 interrupts = <0 120 4>;
504 #size-cells = <0>;
506 reg = <0xffc04000 0x1000>;
508 interrupts = <0 158 0x4>;
514 #size-cells = <0>;
516 reg = <0xffc05000 0x1000>;
518 interrupts = <0 159 0x4>;
524 #size-cells = <0>;
526 reg = <0xffc06000 0x1000>;
528 interrupts = <0 160 0x4>;
534 #size-cells = <0>;
536 reg = <0xffc07000 0x1000>;
538 interrupts = <0 161 0x4>;
544 #size-cells = <0>;
546 reg = <0xff708000 0x1000>;
550 porta: gpio-controller@0 {
556 reg = <0>;
559 interrupts = <0 164 4>;
565 #size-cells = <0>;
567 reg = <0xff709000 0x1000>;
571 portb: gpio-controller@0 {
577 reg = <0>;
580 interrupts = <0 165 4>;
586 #size-cells = <0>;
588 reg = <0xff70a000 0x1000>;
592 portc: gpio-controller@0 {
598 reg = <0>;
601 interrupts = <0 166 4>;
607 reg = <0xffc25000 0x1000>;
613 interrupts = <0 39 4>;
618 reg = <0xfffef000 0x1000>;
619 interrupts = <0 38 0x04>;
628 reg = <0xff704000 0x1000>;
629 interrupts = <0 139 4>;
630 fifo-depth = <0x400>;
632 #size-cells = <0>;
640 #size-cells = <0>;
641 reg = <0xff705000 0x1000>,
642 <0xffa00000 0x1000>;
643 interrupts = <0 151 4>;
645 ext-decoder = <0>; /* external decoder */
656 #size-cells = <0>;
657 reg = <0xfff00000 0x1000>;
658 interrupts = <0 154 4>;
660 bus-num = <0>;
670 #size-cells = <0>;
671 reg = <0xfff01000 0x1000>;
672 interrupts = <0 156 4>;
684 reg = <0xfffec600 0x100>;
685 interrupts = <1 13 0xf04>;
691 interrupts = <0 167 4>;
692 reg = <0xffc08000 0x1000>;
699 interrupts = <0 168 4>;
700 reg = <0xffc09000 0x1000>;
707 interrupts = <0 169 4>;
708 reg = <0xffd00000 0x1000>;
715 interrupts = <0 170 4>;
716 reg = <0xffd01000 0x1000>;
723 reg = <0xffc02000 0x1000>;
724 interrupts = <0 162 4>;
732 reg = <0xffc03000 0x1000>;
733 interrupts = <0 163 4>;
742 reg = <0xffd05000 0x1000>;
745 usbphy0: usbphy@0 {
746 #phy-cells = <0>;
753 reg = <0xffb00000 0xffff>;
754 interrupts = <0 125 4>;
764 reg = <0xffb40000 0xffff>;
765 interrupts = <0 128 4>;
775 reg = <0xffd02000 0x1000>;
776 interrupts = <0 171 4>;
783 reg = <0xffd03000 0x1000>;
784 interrupts = <0 172 4>;
791 reg = <0xffd08000 0x4000>;