Lines Matching +full:pre +full:- +full:clocks
2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/at91.h>
21 interrupt-parent = <&aic>;
44 #address-cells = <1>;
45 #size-cells = <0>;
48 compatible = "arm,cortex-a5";
54 compatible = "arm,cortex-a5-pmu";
62 clocks {
64 compatible = "fixed-clock";
65 #clock-cells = <0>;
66 clock-frequency = <0>;
70 compatible = "fixed-clock";
71 #clock-cells = <0>;
72 clock-frequency = <0>;
76 compatible = "fixed-clock";
77 #clock-cells = <0>;
78 clock-frequency = <1000000>;
83 compatible = "mmio-sram";
88 compatible = "simple-bus";
89 #address-cells = <1>;
90 #size-cells = <1>;
92 u-boot,dm-pre-reloc;
95 compatible = "simple-bus";
96 #address-cells = <1>;
97 #size-cells = <1>;
99 u-boot,dm-pre-reloc;
106 dma-names = "rxtx";
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
110 #address-cells = <1>;
111 #size-cells = <0>;
112 clocks = <&mci0_clk>;
113 clock-names = "mci_clk";
117 #address-cells = <1>;
118 #size-cells = <0>;
119 compatible = "atmel,at91rm9200-spi";
124 dma-names = "tx", "rx";
125 pinctrl-names = "default";
126 pinctrl-0 = <&pinctrl_spi0>;
127 clocks = <&spi0_clk>;
128 clock-names = "spi_clk";
133 compatible = "atmel,at91sam9g45-ssc";
138 dma-names = "tx", "rx";
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
141 clocks = <&ssc0_clk>;
142 clock-names = "pclk";
147 compatible = "atmel,at91sam9x5-tcb";
150 clocks = <&tcb0_clk>, <&clk32k>;
151 clock-names = "t0_clk", "slow_clk";
155 compatible = "atmel,at91sam9x5-i2c";
160 dma-names = "tx", "rx";
161 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_i2c0>;
163 #address-cells = <1>;
164 #size-cells = <0>;
165 clocks = <&twi0_clk>;
170 compatible = "atmel,at91sam9x5-i2c";
175 dma-names = "tx", "rx";
176 pinctrl-names = "default";
177 pinctrl-0 = <&pinctrl_i2c1>;
178 #address-cells = <1>;
179 #size-cells = <0>;
180 clocks = <&twi1_clk>;
185 compatible = "atmel,at91sam9260-usart";
190 dma-names = "tx", "rx";
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_usart0>;
193 clocks = <&usart0_clk>;
194 clock-names = "usart";
199 compatible = "atmel,at91sam9260-usart";
204 dma-names = "tx", "rx";
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_usart1>;
207 clocks = <&usart1_clk>;
208 clock-names = "usart";
213 compatible = "atmel,at91sam9260-usart";
216 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_uart0>;
218 clocks = <&uart0_clk>;
219 clock-names = "usart";
224 compatible = "atmel,sama5d3-pwm";
227 #pwm-cells = <3>;
228 clocks = <&pwm_clk>;
233 compatible = "atmel,at91sam9g45-isi";
236 pinctrl-names = "default";
237 pinctrl-0 = <&pinctrl_isi_data_0_7>;
238 clocks = <&isi_clk>;
239 clock-names = "isi_clk";
242 #address-cells = <1>;
243 #size-cells = <0>;
248 compatible = "atmel,sama5d3-sfr", "syscon";
257 dma-names = "rxtx";
258 pinctrl-names = "default";
259 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
261 #address-cells = <1>;
262 #size-cells = <0>;
263 clocks = <&mci1_clk>;
264 clock-names = "mci_clk";
268 #address-cells = <1>;
269 #size-cells = <0>;
270 compatible = "atmel,at91rm9200-spi";
275 dma-names = "tx", "rx";
276 pinctrl-names = "default";
277 pinctrl-0 = <&pinctrl_spi1>;
278 clocks = <&spi1_clk>;
279 clock-names = "spi_clk";
284 compatible = "atmel,at91sam9g45-ssc";
289 dma-names = "tx", "rx";
290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
292 clocks = <&ssc1_clk>;
293 clock-names = "pclk";
298 #address-cells = <1>;
299 #size-cells = <0>;
300 compatible = "atmel,at91sam9x5-adc";
303 pinctrl-names = "default";
304 pinctrl-0 = <
319 clocks = <&adc_clk>,
321 clock-names = "adc_clk", "adc_op_clk";
322 atmel,adc-channels-used = <0xfff>;
323 atmel,adc-startup-time = <40>;
324 atmel,adc-use-external-triggers;
325 atmel,adc-vref = <3000>;
326 atmel,adc-res = <10 12>;
327 atmel,adc-sample-hold-time = <11>;
328 atmel,adc-res-names = "lowres", "highres";
333 trigger-name = "external-rising";
334 trigger-value = <0x1>;
335 trigger-external;
339 trigger-name = "external-falling";
340 trigger-value = <0x2>;
341 trigger-external;
345 trigger-name = "external-any";
346 trigger-value = <0x3>;
347 trigger-external;
351 trigger-name = "continuous";
352 trigger-value = <0x6>;
357 compatible = "atmel,at91sam9x5-i2c";
362 dma-names = "tx", "rx";
363 pinctrl-names = "default";
364 pinctrl-0 = <&pinctrl_i2c2>;
365 #address-cells = <1>;
366 #size-cells = <0>;
367 clocks = <&twi2_clk>;
372 compatible = "atmel,at91sam9260-usart";
377 dma-names = "tx", "rx";
378 pinctrl-names = "default";
379 pinctrl-0 = <&pinctrl_usart2>;
380 clocks = <&usart2_clk>;
381 clock-names = "usart";
386 compatible = "atmel,at91sam9260-usart";
391 dma-names = "tx", "rx";
392 pinctrl-names = "default";
393 pinctrl-0 = <&pinctrl_usart3>;
394 clocks = <&usart3_clk>;
395 clock-names = "usart";
400 compatible = "atmel,at91sam9g46-sha";
404 dma-names = "tx";
405 clocks = <&sha_clk>;
406 clock-names = "sha_clk";
410 compatible = "atmel,at91sam9g46-aes";
415 dma-names = "tx", "rx";
416 clocks = <&aes_clk>;
417 clock-names = "aes_clk";
421 compatible = "atmel,at91sam9g46-tdes";
426 dma-names = "tx", "rx";
427 clocks = <&tdes_clk>;
428 clock-names = "tdes_clk";
432 compatible = "atmel,at91sam9g45-trng";
435 clocks = <&trng_clk>;
438 dma0: dma-controller@ffffe600 {
439 compatible = "atmel,at91sam9g45-dma";
442 #dma-cells = <2>;
443 clocks = <&dma0_clk>;
444 clock-names = "dma_clk";
447 dma1: dma-controller@ffffe800 {
448 compatible = "atmel,at91sam9g45-dma";
451 #dma-cells = <2>;
452 clocks = <&dma1_clk>;
453 clock-names = "dma_clk";
457 compatible = "atmel,sama5d3-ddramc";
459 clocks = <&ddrck>, <&mpddr_clk>;
460 clock-names = "ddrck", "mpddr";
464 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
469 dma-names = "tx", "rx";
470 pinctrl-names = "default";
471 pinctrl-0 = <&pinctrl_dbgu>;
472 clocks = <&dbgu_clk>;
473 clock-names = "usart";
477 aic: interrupt-controller@fffff000 {
478 #interrupt-cells = <3>;
479 compatible = "atmel,sama5d3-aic";
480 interrupt-controller;
482 atmel,external-irqs = <47>;
486 u-boot,dm-pre-reloc;
487 #address-cells = <1>;
488 #size-cells = <1>;
489 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
491 atmel,mux-mask = <
563 u-boot,dm-pre-reloc;
564 pinctrl_dbgu: dbgu-0 {
565 u-boot,dm-pre-reloc;
573 pinctrl_i2c0: i2c0-0 {
581 pinctrl_i2c1: i2c1-0 {
589 pinctrl_i2c2: i2c2-0 {
597 pinctrl_isi_data_0_7: isi-0-data-0-7 {
612 pinctrl_isi_data_8_9: isi-0-data-8-9 {
618 pinctrl_isi_data_10_11: isi-0-data-10-11 {
626 u-boot,dm-pre-reloc;
628 u-boot,dm-pre-reloc;
635 u-boot,dm-pre-reloc;
642 u-boot,dm-pre-reloc;
652 u-boot,dm-pre-reloc;
654 u-boot,dm-pre-reloc;
661 u-boot,dm-pre-reloc;
670 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
678 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
682 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
686 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
690 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
695 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
699 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
703 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
707 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
711 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
715 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
720 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
724 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
728 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
732 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
737 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
741 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
745 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
749 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
756 u-boot,dm-pre-reloc;
757 pinctrl_spi0: spi0-0 {
758 u-boot,dm-pre-reloc;
767 u-boot,dm-pre-reloc;
768 pinctrl_spi1: spi1-0 {
769 u-boot,dm-pre-reloc;
810 pinctrl_uart0: uart0-0 {
818 pinctrl_uart1: uart1-0 {
826 pinctrl_usart0: usart0-0 {
832 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
840 pinctrl_usart1: usart1-0 {
846 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
854 pinctrl_usart2: usart2-0 {
860 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
868 pinctrl_usart3: usart3-0 {
874 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
883 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
886 #gpio-cells = <2>;
887 gpio-controller;
888 interrupt-controller;
889 #interrupt-cells = <2>;
890 clocks = <&pioA_clk>;
891 u-boot,dm-pre-reloc;
895 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
898 #gpio-cells = <2>;
899 gpio-controller;
900 interrupt-controller;
901 #interrupt-cells = <2>;
902 clocks = <&pioB_clk>;
903 u-boot,dm-pre-reloc;
907 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
910 #gpio-cells = <2>;
911 gpio-controller;
912 interrupt-controller;
913 #interrupt-cells = <2>;
914 clocks = <&pioC_clk>;
915 u-boot,dm-pre-reloc;
919 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
922 #gpio-cells = <2>;
923 gpio-controller;
924 interrupt-controller;
925 #interrupt-cells = <2>;
926 clocks = <&pioD_clk>;
927 u-boot,dm-pre-reloc;
931 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
934 #gpio-cells = <2>;
935 gpio-controller;
936 interrupt-controller;
937 #interrupt-cells = <2>;
938 clocks = <&pioE_clk>;
939 u-boot,dm-pre-reloc;
943 compatible = "atmel,sama5d3-pmc", "syscon";
946 interrupt-controller;
947 #address-cells = <1>;
948 #size-cells = <0>;
949 #interrupt-cells = <1>;
950 u-boot,dm-pre-reloc;
953 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
954 #clock-cells = <0>;
955 interrupt-parent = <&pmc>;
957 clock-frequency = <12000000>;
958 clock-accuracy = <50000000>;
962 compatible = "atmel,at91rm9200-clk-main-osc";
963 #clock-cells = <0>;
964 interrupt-parent = <&pmc>;
966 clocks = <&main_xtal>;
970 compatible = "atmel,at91sam9x5-clk-main";
971 #clock-cells = <0>;
972 interrupt-parent = <&pmc>;
974 clocks = <&main_rc_osc &main_osc>;
978 compatible = "atmel,sama5d3-clk-pll";
979 #clock-cells = <0>;
980 interrupt-parent = <&pmc>;
982 clocks = <&main>;
984 atmel,clk-input-range = <8000000 50000000>;
985 #atmel,pll-clk-output-range-cells = <4>;
986 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
990 compatible = "atmel,at91sam9x5-clk-plldiv";
991 #clock-cells = <0>;
992 clocks = <&plla>;
996 compatible = "atmel,at91sam9x5-clk-utmi";
997 #clock-cells = <0>;
998 interrupt-parent = <&pmc>;
1000 clocks = <&main>;
1004 compatible = "atmel,at91sam9x5-clk-master";
1005 #clock-cells = <0>;
1006 interrupt-parent = <&pmc>;
1008 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
1009 atmel,clk-output-range = <0 166000000>;
1010 atmel,clk-divisors = <1 2 4 3>;
1011 u-boot,dm-pre-reloc;
1015 compatible = "atmel,at91sam9x5-clk-usb";
1016 #clock-cells = <0>;
1017 clocks = <&plladiv>, <&utmi>;
1021 compatible = "atmel,at91sam9x5-clk-programmable";
1022 #address-cells = <1>;
1023 #size-cells = <0>;
1024 interrupt-parent = <&pmc>;
1025 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
1028 #clock-cells = <0>;
1034 #clock-cells = <0>;
1040 #clock-cells = <0>;
1047 compatible = "atmel,at91sam9x5-clk-smd";
1048 #clock-cells = <0>;
1049 clocks = <&plladiv>, <&utmi>;
1053 compatible = "atmel,at91rm9200-clk-system";
1054 #address-cells = <1>;
1055 #size-cells = <0>;
1058 #clock-cells = <0>;
1060 clocks = <&mck>;
1064 #clock-cells = <0>;
1066 clocks = <&smd>;
1070 #clock-cells = <0>;
1072 clocks = <&usb>;
1076 #clock-cells = <0>;
1078 clocks = <&usb>;
1082 #clock-cells = <0>;
1084 clocks = <&prog0>;
1088 #clock-cells = <0>;
1090 clocks = <&prog1>;
1094 #clock-cells = <0>;
1096 clocks = <&prog2>;
1101 compatible = "atmel,at91sam9x5-clk-peripheral";
1102 #address-cells = <1>;
1103 #size-cells = <0>;
1104 clocks = <&mck>;
1105 u-boot,dm-pre-reloc;
1108 u-boot,dm-pre-reloc;
1109 #clock-cells = <0>;
1114 #clock-cells = <0>;
1119 u-boot,dm-pre-reloc;
1120 #clock-cells = <0>;
1125 u-boot,dm-pre-reloc;
1126 #clock-cells = <0>;
1131 u-boot,dm-pre-reloc;
1132 #clock-cells = <0>;
1137 u-boot,dm-pre-reloc;
1138 #clock-cells = <0>;
1143 u-boot,dm-pre-reloc;
1144 #clock-cells = <0>;
1149 #clock-cells = <0>;
1151 atmel,clk-output-range = <0 66000000>;
1155 #clock-cells = <0>;
1157 atmel,clk-output-range = <0 66000000>;
1161 #clock-cells = <0>;
1163 atmel,clk-output-range = <0 66000000>;
1167 #clock-cells = <0>;
1169 atmel,clk-output-range = <0 66000000>;
1173 #clock-cells = <0>;
1175 atmel,clk-output-range = <0 66000000>;
1180 #clock-cells = <0>;
1181 atmel,clk-output-range = <0 16625000>;
1185 #clock-cells = <0>;
1187 atmel,clk-output-range = <0 16625000>;
1191 #clock-cells = <0>;
1193 atmel,clk-output-range = <0 16625000>;
1197 u-boot,dm-pre-reloc;
1198 #clock-cells = <0>;
1203 u-boot,dm-pre-reloc;
1204 #clock-cells = <0>;
1209 u-boot,dm-pre-reloc;
1210 #clock-cells = <0>;
1212 atmel,clk-output-range = <0 133000000>;
1216 u-boot,dm-pre-reloc;
1217 #clock-cells = <0>;
1219 atmel,clk-output-range = <0 133000000>;
1223 #clock-cells = <0>;
1225 atmel,clk-output-range = <0 133000000>;
1229 #clock-cells = <0>;
1234 #clock-cells = <0>;
1236 atmel,clk-output-range = <0 66000000>;
1240 #clock-cells = <0>;
1245 #clock-cells = <0>;
1250 #clock-cells = <0>;
1255 #clock-cells = <0>;
1260 #clock-cells = <0>;
1265 #clock-cells = <0>;
1267 atmel,clk-output-range = <0 66000000>;
1271 #clock-cells = <0>;
1273 atmel,clk-output-range = <0 66000000>;
1277 #clock-cells = <0>;
1282 #clock-cells = <0>;
1287 #clock-cells = <0>;
1292 #clock-cells = <0>;
1297 #clock-cells = <0>;
1302 #clock-cells = <0>;
1309 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1311 clocks = <&clk32k>;
1314 shutdown-controller@fffffe10 {
1315 compatible = "atmel,at91sam9x5-shdwc";
1317 clocks = <&clk32k>;
1321 compatible = "atmel,at91sam9260-pit";
1324 clocks = <&mck>;
1328 compatible = "atmel,at91sam9260-wdt";
1331 clocks = <&clk32k>;
1332 atmel,watchdog-type = "hardware";
1333 atmel,reset-type = "all";
1334 atmel,dbg-halt;
1339 compatible = "atmel,at91sam9x5-sckc";
1343 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1344 #clock-cells = <0>;
1345 clock-frequency = <32768>;
1346 clock-accuracy = <50000000>;
1347 atmel,startup-time-usec = <75>;
1351 compatible = "atmel,at91sam9x5-clk-slow-osc";
1352 #clock-cells = <0>;
1353 clocks = <&slow_xtal>;
1354 atmel,startup-time-usec = <1200000>;
1358 compatible = "atmel,at91sam9x5-clk-slow";
1359 #clock-cells = <0>;
1360 clocks = <&slow_rc_osc &slow_osc>;
1365 compatible = "atmel,at91rm9200-rtc";
1368 clocks = <&clk32k>;
1373 #address-cells = <1>;
1374 #size-cells = <0>;
1375 compatible = "atmel,sama5d3-udc";
1379 clocks = <&udphs_clk>, <&utmi>;
1380 clock-names = "pclk", "hclk";
1385 atmel,fifo-size = <64>;
1386 atmel,nb-banks = <1>;
1391 atmel,fifo-size = <1024>;
1392 atmel,nb-banks = <3>;
1393 atmel,can-dma;
1394 atmel,can-isoc;
1399 atmel,fifo-size = <1024>;
1400 atmel,nb-banks = <3>;
1401 atmel,can-dma;
1402 atmel,can-isoc;
1407 atmel,fifo-size = <1024>;
1408 atmel,nb-banks = <2>;
1409 atmel,can-dma;
1414 atmel,fifo-size = <1024>;
1415 atmel,nb-banks = <2>;
1416 atmel,can-dma;
1421 atmel,fifo-size = <1024>;
1422 atmel,nb-banks = <2>;
1423 atmel,can-dma;
1428 atmel,fifo-size = <1024>;
1429 atmel,nb-banks = <2>;
1430 atmel,can-dma;
1435 atmel,fifo-size = <1024>;
1436 atmel,nb-banks = <2>;
1437 atmel,can-dma;
1442 atmel,fifo-size = <1024>;
1443 atmel,nb-banks = <2>;
1448 atmel,fifo-size = <1024>;
1449 atmel,nb-banks = <2>;
1454 atmel,fifo-size = <1024>;
1455 atmel,nb-banks = <2>;
1460 atmel,fifo-size = <1024>;
1461 atmel,nb-banks = <2>;
1466 atmel,fifo-size = <1024>;
1467 atmel,nb-banks = <2>;
1472 atmel,fifo-size = <1024>;
1473 atmel,nb-banks = <2>;
1478 atmel,fifo-size = <1024>;
1479 atmel,nb-banks = <2>;
1484 atmel,fifo-size = <1024>;
1485 atmel,nb-banks = <2>;
1490 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1493 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1494 clock-names = "ohci_clk", "hclk", "uhpck";
1499 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1502 clocks = <&utmi>, <&uhphs_clk>;
1503 clock-names = "usb_clk", "ehci_clk";
1508 compatible = "atmel,at91rm9200-nand";
1509 #address-cells = <1>;
1510 #size-cells = <1>;
1518 atmel,nand-addr-offset = <21>;
1519 atmel,nand-cmd-offset = <22>;
1520 atmel,nand-has-dma;
1521 pinctrl-names = "default";
1522 pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1523 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1527 compatible = "atmel,sama5d3-nfc";
1528 #address-cells = <1>;
1529 #size-cells = <1>;
1535 clocks = <&hsmc_clk>;