arm/dts/rk3568-u-boot.dtsi

4  * SPDX-License-Identifier:     GPL-2.0+
17 		stdout-path = &uart2;
18 		u-boot,spl-boot-order = &sdmmc0, &sdhci, &nandc0, &spi_nand, &spi_nor;
21 	secure-otp@fe3a0000 {
22 		compatible = "rockchip,rk3568-secure-otp";
27 		u-boot,dm-spl;
32 	u-boot,dm-spl;
33 	u-boot,dm-pre-reloc;
37 	u-boot,dm-spl;
38 	u-boot,dm-pre-reloc;
42 	u-boot,dm-spl;
43 	u-boot,dm-pre-reloc;
48 	u-boot,dm-pre-reloc;
53 	u-boot,dm-spl;
57 	clock-frequency = <24000000>;
58 	u-boot,dm-spl;
59 	/delete-property/ pinctrl-names;
60 	/delete-property/ pinctrl-0;
65 	u-boot,dm-spl;
70 	u-boot,dm-spl;
75 	u-boot,dm-pre-reloc;
80 	u-boot,dm-pre-reloc;
85 	u-boot,dm-pre-reloc;
90 	u-boot,dm-pre-reloc;
95 	u-boot,dm-pre-reloc;
100 	u-boot,dm-pre-reloc;
105 	u-boot,dm-pre-reloc;
110 	u-boot,dm-pre-reloc;
115 	u-boot,dm-spl;
120 	u-boot,dm-spl;
125 	u-boot,dm-spl;
130 	u-boot,dm-pre-reloc;
135 	u-boot,dm-spl;
136 	/delete-property/ pinctrl-names;
137 	/delete-property/ pinctrl-0;
138 	/delete-property/ assigned-clocks;
139 	/delete-property/ assigned-clock-rates;
142 	#address-cells = <1>;
143 	#size-cells = <0>;
145 		u-boot,dm-spl;
146 		compatible = "spi-nand";
148 		spi-tx-bus-width = <1>;
149 		spi-rx-bus-width = <4>;
150 		spi-max-frequency = <75000000>;
154 		u-boot,dm-spl;
155 		compatible = "jedec,spi-nor";
158 		spi-tx-bus-width = <1>;
159 		spi-rx-bus-width = <4>;
160 		spi-max-frequency = <100000000>;
165 	u-boot,dm-pre-reloc;
170 	u-boot,dm-spl;
175 	u-boot,dm-spl;
179 	u-boot,dm-spl;
183 	u-boot,dm-spl;
187 	u-boot,dm-spl;
191 	u-boot,dm-spl;
195 	u-boot,dm-spl;
196 	/delete-property/ pinctrl-names;
197 	/delete-property/ pinctrl-0;
202 	bus-width = <8>;
203 	u-boot,dm-spl;
204 	/delete-property/ pinctrl-names;
205 	/delete-property/ pinctrl-0;
206 	mmc-hs200-1_8v;
211 	u-boot,dm-spl;
213 	#address-cells = <1>;
214 	#size-cells = <0>;
215 	/delete-property/ pinctrl-names;
216 	/delete-property/ pinctrl-0;
219 		u-boot,dm-spl;
221 		nand-ecc-mode = "hw";
222 		nand-ecc-strength = <16>;
223 		nand-ecc-step-size = <1024>;
228 	u-boot,dm-pre-reloc;
232 	u-boot,dm-pre-reloc;
236 	u-boot,dm-pre-reloc;
237 	phy-mode = "rgmii";
240 	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
241 	snps,reset-active-low;
243 	snps,reset-delays-us = <0 20000 100000>;
244 	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
245 	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
246 	assigned-clock-rates = <0>, <125000000>;
248 	pinctrl-names = "default";
249 	pinctrl-0 = <&gmac0_miim
258 	phy-handle = <&rgmii_phy0>;
263 	u-boot,dm-pre-reloc;
264 	phy-mode = "rgmii";
267 	snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
268 	snps,reset-active-low;
270 	snps,reset-delays-us = <0 20000 100000>;
272 	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
273 	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
274 	assigned-clock-rates = <0>, <125000000>;
276 	pinctrl-names = "default";
277 	pinctrl-0 = <&gmac1m1_miim
286 	phy-handle = <&rgmii_phy1>;
291 	u-boot,dm-pre-reloc;
295 	u-boot,dm-pre-reloc;
297 		u-boot,dm-pre-reloc;
302 	u-boot,dm-pre-reloc;
304 		u-boot,dm-pre-reloc;
309 	u-boot,dm-pre-reloc;
313 	u-boot,dm-pre-reloc;
315 		u-boot,dm-pre-reloc;
320 	u-boot,dm-pre-reloc;
322 		u-boot,dm-pre-reloc;
327 	u-boot,dm-pre-reloc;
329 		compatible = "ethernet-phy-ieee802.3-c22";
330 		u-boot,dm-pre-reloc;
336 	u-boot,dm-pre-reloc;
338 		compatible = "ethernet-phy-ieee802.3-c22";
339 		u-boot,dm-pre-reloc;
345 	u-boot,dm-pre-reloc;
349 	u-boot,dm-pre-reloc;
353 	u-boot,dm-pre-reloc;
357 	u-boot,dm-pre-reloc;
361 	u-boot,dm-pre-reloc;
365 	u-boot,dm-pre-reloc;
369 	u-boot,dm-pre-reloc;
373 	u-boot,dm-pre-reloc;
377 	u-boot,dm-pre-reloc;
381 	u-boot,dm-pre-reloc;
385 	u-boot,dm-pre-reloc;
389 	u-boot,dm-pre-reloc;
393 	u-boot,dm-pre-reloc;
397 	u-boot,dm-pre-reloc;
401 	u-boot,dm-pre-reloc;
406 	u-boot,dm-pre-reloc;
411 	u-boot,dm-pre-reloc;
416 	u-boot,dm-spl;
420 	u-boot,dm-spl;
424 	u-boot,dm-spl;
428 	u-boot,dm-spl;
432 	u-boot,dm-spl;
437 	u-boot,dm-spl;
441 	u-boot,dm-spl;
445 	u-boot,dm-spl;
449 	u-boot,dm-spl;
453 	u-boot,dm-pre-reloc;
458 	u-boot,dm-spl;
464 	u-boot,dm-spl;
465 	u-boot,dm-pre-reloc;
468 		compatible = "atmel,24c256", "i2c-eeprom";
474 	u-boot,dm-spl;
475 	u-boot,dm-pre-reloc;
479 	u-boot,dm-spl;
480 	u-boot,dm-pre-reloc;
485 	u-boot,dm-pre-reloc;
490 	u-boot,dm-pre-reloc;
495 	u-boot,dm-pre-reloc;