Lines Matching +full:u +full:- +full:boot +full:- +full:spl
4 * SPDX-License-Identifier: GPL-2.0+
14 stdout-path = &uart2;
15 u-boot,spl-boot-order = &sdmmc0, &sdhci, &spi_nand, &spi_nor;
18 secure-otp@ff920000 {
19 compatible = "rockchip,rk3562-secure-otp";
24 u-boot,dm-spl;
30 u-boot,dm-spl;
35 u-boot,dm-spl;
40 u-boot,dm-spl;
45 u-boot,dm-pre-reloc;
50 u-boot,dm-spl;
54 u-boot,dm-spl;
58 u-boot,dm-spl;
62 u-boot,dm-spl;
66 u-boot,dm-spl;
71 u-boot,dm-spl;
76 u-boot,dm-pre-reloc;
81 clock-frequency = <24000000>;
82 u-boot,dm-spl;
87 u-boot,dm-pre-reloc;
92 u-boot,dm-pre-reloc;
97 bus-width = <8>;
98 u-boot,dm-spl;
99 /delete-property/ pinctrl-names;
100 /delete-property/ pinctrl-0;
101 mmc-hs400-1_8v;
102 mmc-hs400-enhanced-strobe;
103 fixed-emmc-driver-type = <1>;
108 u-boot,dm-spl;
109 pinctrl-names = "default";
110 pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
115 u-boot,dm-spl;
119 u-boot,dm-spl;
123 u-boot,dm-spl;
127 u-boot,dm-spl;
131 u-boot,dm-spl;
135 u-boot,dm-spl;
138 #address-cells = <1>;
139 #size-cells = <0>;
141 u-boot,dm-spl;
142 compatible = "spi-nand";
144 spi-tx-bus-width = <1>;
145 spi-rx-bus-width = <4>;
146 spi-max-frequency = <80000000>;
150 u-boot,dm-spl;
151 compatible = "jedec,spi-nor";
154 spi-tx-bus-width = <1>;
155 spi-rx-bus-width = <4>;
156 spi-max-frequency = <80000000>;
161 u-boot,dm-spl;
166 u-boot,dm-pre-reloc;
170 u-boot,dm-pre-reloc;
174 u-boot,dm-pre-reloc;
178 u-boot,dm-pre-reloc;
182 u-boot,dm-pre-reloc;
186 u-boot,dm-spl;
191 u-boot,dm-spl;
196 u-boot,dm-pre-reloc;
201 u-boot,dm-pre-reloc;