Lines Matching +full:0 +full:xff100000
76 #address-cells = <0x2>;
77 #size-cells = <0x0>;
114 cpu_sleep: cpu-sleep-0 {
116 arm,psci-suspend-param = <0x1010000>;
117 entry-latency-us = <0x3fffffff>;
118 exit-latency-us = <0x40000000>;
119 min-residency-us = <0xffffffff>;
123 cpu_l0: cpu@0 {
126 reg = <0x0 0x0>;
136 reg = <0x0 0x1>;
144 reg = <0x0 0x2>;
152 reg = <0x0 0x3>;
160 reg = <0x0 0x100>;
170 reg = <0x0 0x101>;
178 reg = <0x0 0x102>;
186 reg = <0x0 0x103>;
228 #clock-cells = <0>;
236 reg = <0 0xff610000 0 0x400
237 0 0xff620000 0 0x400>;
242 reg = <0x0 0xffac0000 0x0 0x2000>;
248 reg = <0x0 0xff0c0000 0x0 0x4000>;
253 fifo-depth = <0x100>;
261 reg = <0x0 0xff0d0000 0x0 0x4000>;
266 fifo-depth = <0x100>;
273 reg = <0x0 0xff0f0000 0x0 0x4000>;
278 fifo-depth = <0x100>;
285 reg = <0x0 0xff100000 0x0 0x100>;
295 reg = <0x0 0xff110000 0x0 0x1000>;
300 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
302 #size-cells = <0>;
308 reg = <0x0 0xff120000 0x0 0x1000>;
313 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
315 #size-cells = <0>;
321 reg = <0x0 0xff130000 0x0 0x1000>;
326 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
328 #size-cells = <0>;
334 reg = <0x0 0xff140000 0x0 0x1000>;
337 #size-cells = <0>;
341 pinctrl-0 = <&i2c1_xfer>;
347 reg = <0x0 0xff150000 0x0 0x1000>;
350 #size-cells = <0>;
354 pinctrl-0 = <&i2c3_xfer>;
360 reg = <0x0 0xff160000 0x0 0x1000>;
363 #size-cells = <0>;
367 pinctrl-0 = <&i2c4_xfer>;
373 reg = <0x0 0xff170000 0x0 0x1000>;
376 #size-cells = <0>;
380 pinctrl-0 = <&i2c5_xfer>;
386 reg = <0x0 0xff400000 0x0 0x4000>;
388 nandc_id = <0>;
396 reg = <0x0 0xff180000 0x0 0x100>;
404 pinctrl-0 = <&uart0_xfer>;
410 reg = <0x0 0xff190000 0x0 0x100>;
424 reg = <0x0 0xff1b0000 0x0 0x100>;
432 pinctrl-0 = <&uart3_xfer>;
438 reg = <0x0 0xff1c0000 0x0 0x100>;
446 pinctrl-0 = <&uart4_xfer>;
455 thermal-sensors = <&tsadc 0>;
520 reg = <0x0 0xff280000 0x0 0x100>;
527 pinctrl-0 = <&otp_gpio>;
537 reg = <0x0 0xff290000 0x0 0x10000>;
554 reg = <0x0 0xff500000 0x0 0x100>;
565 reg = <0x0 0xff520000 0x0 0x20000>;
577 reg = <0x0 0xff580000 0x0 0x40000>;
593 reg = <0x0 0xff650000 0x0 0x1000>;
598 pinctrl-0 = <&i2c0_xfer>;
600 #size-cells = <0>;
606 reg = <0x0 0xff660000 0x0 0x1000>;
609 #size-cells = <0>;
613 pinctrl-0 = <&i2c2_xfer>;
619 reg = <0x0 0xff680000 0x0 0x10>;
622 pinctrl-0 = <&pwm0_pin>;
630 reg = <0x0 0xff680010 0x0 0x10>;
633 pinctrl-0 = <&pwm1_pin>;
641 reg = <0x0 0xff680020 0x0 0x10>;
650 reg = <0x0 0xff680030 0x0 0x10>;
653 pinctrl-0 = <&pwm3_pin>;
661 reg = <0x0 0xff690000 0x0 0x100>;
667 pinctrl-0 = <&uart2_xfer>;
675 reg = <0x0 0xff6b0000 0x0 0x1000>;
687 reg = <0x0 0xff738000 0x0 0x1000>;
692 reg = <0x0 0xff740000 0x0 0x1000>;
697 reg = <0x0 0xff760000 0x0 0x1000>;
705 reg = <0x0 0xff770000 0x0 0x1000>;
711 reg = <0x700 0x2c>;
714 #clock-cells = <0>;
721 #phy-cells = <0>;
731 #phy-cells = <0>;
741 reg = <0x0 0xff800000 0x0 0x100>;
749 reg = <0x0 0xff810000 0x0 0x20>;
755 reg = <0x0 0xff8a0000 0x0 0x10000>;
765 #address-cells = <0>;
767 reg = <0x0 0xffb71000 0x0 0x1000>,
768 <0x0 0xffb72000 0x0 0x1000>,
769 <0x0 0xffb74000 0x0 0x2000>,
770 <0x0 0xffb76000 0x0 0x2000>;
779 #address-cells = <0x2>;
780 #size-cells = <0x2>;
785 reg = <0x0 0xff750000 0x0 0x100>;
787 interrupts = <GIC_SPI 0x51 IRQ_TYPE_LEVEL_HIGH>;
790 #gpio-cells = <0x2>;
793 #interrupt-cells = <0x2>;
798 reg = <0x0 0xff780000 0x0 0x100>;
800 interrupts = <GIC_SPI 0x52 IRQ_TYPE_LEVEL_HIGH>;
803 #gpio-cells = <0x2>;
806 #interrupt-cells = <0x2>;
811 reg = <0x0 0xff790000 0x0 0x100>;
813 interrupts = <GIC_SPI 0x53 IRQ_TYPE_LEVEL_HIGH>;
816 #gpio-cells = <0x2>;
819 #interrupt-cells = <0x2>;
824 reg = <0x0 0xff7a0000 0x0 0x100>;
826 interrupts = <GIC_SPI 0x54 IRQ_TYPE_LEVEL_HIGH>;
829 #gpio-cells = <0x2>;
832 #interrupt-cells = <0x2>;
923 rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>,
924 <0 7 RK_FUNC_1 &pcfg_pull_none>;
937 rockchip,pins = <0 9 RK_FUNC_2 &pcfg_pull_none>,
971 rockchip,pins = <0 8 RK_FUNC_2 &pcfg_pull_none>;
994 rockchip,pins = <3 0 RK_FUNC_1 &pcfg_pull_up>;
1085 rockchip,pins = <0 12 RK_FUNC_2 &pcfg_pull_up>;
1088 rockchip,pins = <0 13 RK_FUNC_2 &pcfg_pull_up>;
1091 rockchip,pins = <0 10 RK_FUNC_2 &pcfg_pull_up>;
1094 rockchip,pins = <0 11 RK_FUNC_2 &pcfg_pull_up>;
1100 rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
1104 rockchip,pins = <0 3 RK_FUNC_1 &pcfg_pull_none>;
1125 rockchip,pins = <0 20 RK_FUNC_3 &pcfg_pull_up>,
1126 <0 21 RK_FUNC_3 &pcfg_pull_none>;
1130 rockchip,pins = <0 22 RK_FUNC_3 &pcfg_pull_none>;
1134 rockchip,pins = <0 23 RK_FUNC_3 &pcfg_pull_none>;
1163 rockchip,pins = <0 27 RK_FUNC_3 &pcfg_pull_up>,
1164 <0 26 RK_FUNC_3 &pcfg_pull_none>;
1168 rockchip,pins = <0 24 RK_FUNC_3 &pcfg_pull_none>;
1172 rockchip,pins = <0 25 RK_FUNC_3 &pcfg_pull_none>;