Lines Matching +full:0 +full:xff100000
39 #size-cells = <0>;
41 cpu0: cpu@0 {
44 reg = <0x0 0x0>;
51 reg = <0x0 0x1>;
71 #clock-cells = <0>;
87 #clock-cells = <0>;
94 #clock-cells = <0>;
110 reg = <0x0 0xfd000000 0x0 0x200000>;
127 reg = <0x0 0xfe000000 0x0 0x1000>;
142 #size-cells = <0>;
144 port@0 {
145 reg = <0>;
158 reg = <0x0 0xfe010000 0x0 0x8000>;
164 reg = <0x100 0x10>;
167 #clock-cells = <0>;
174 #phy-cells = <0>;
181 #phy-cells = <0>;
194 reg = <0x0 0xfe020000 0x0 0x1000>;
211 reg = <0x0 0xfe850000 0x0 0x20>;
216 reg = <0x0 0xfe880000 0x0 0x20>;
221 reg = <0x0 0xfe8a0000 0x0 0x20>;
226 reg = <0x0 0xfe8a0080 0x0 0x20>;
231 reg = <0x0 0xfe8a0100 0x0 0x20>;
236 reg = <0x0 0xfe8a0180 0x0 0x20>;
241 reg = <0x0 0xfe8b0000 0x0 0x20>;
246 reg = <0x0 0xfe8b0080 0x0 0x20>;
251 reg = <0x0 0xfe8c000 0x0 0x20>;
256 reg = <0x0 0xfec00000 0x0 0x200000>;
259 ranges = <0 0x0 0xfec00000 0x200000>;
261 ddr-sram@0 {
262 reg = <0x0 0x8000>;
266 reg = <0x1c0000 0x40000>;
278 reg = <0x0 0xff100000 0 0x10000>, /* GICD */
279 <0x0 0xff140000 0 0xc0000>, /* GICR */
280 <0x0 0xff300000 0 0x10000>, /* GICC */
281 <0x0 0xff310000 0 0x10000>, /* GICH */
282 <0x0 0xff320000 0 0x10000>; /* GICV */
287 reg = <0x0 0xff120000 0x0 0x20000>;
293 reg = <0x0 0xff350000 0x0 0x5000>;
314 reg = <0x0 0xff370000 0x0 0x500>;
318 #clock-cells = <0>;
321 #phy-cells = <0>;
328 reg = <0x0 0xff3a0000 0x0 0x100>;
344 reg = <0x0 0xff3d0000 0x0 0x10>;
347 pinctrl-0 = <&pwm0_pin>;
355 reg = <0x0 0xff3d0010 0x0 0x10>;
358 pinctrl-0 = <&pwm1_pin>;
366 reg = <0x0 0xff3d0020 0x0 0x10>;
369 pinctrl-0 = <&pwm2_pin>;
377 reg = <0x0 0xff3d0030 0x0 0x10>;
380 pinctrl-0 = <&pwm3_pin>;
388 reg = <0x0 0xff3d8000 0x0 0x10>;
391 pinctrl-0 = <&pwm4_pin>;
399 reg = <0x0 0xff3d8010 0x0 0x10>;
402 pinctrl-0 = <&pwm5_pin>;
410 reg = <0x0 0xff3d8020 0x0 0x10>;
413 pinctrl-0 = <&pwm6_pin>;
421 reg = <0x0 0xff3d8030 0x0 0x10>;
424 pinctrl-0 = <&pwm7_pin>;
432 reg = <0x0 0xff3e0000 0x0 0x1000>;
438 #size-cells = <0>;
496 reg = <0x0 0xff410000 0x0 0x1000>;
501 pinctrl-0 = <&i2c0_xfer>;
503 #size-cells = <0>;
509 reg = <0x0 0xff4e0000 0x0 0x4000>;
519 reg = <0x0 0xff430000 0x0 0x100>;
525 dmas = <&dmac 0>, <&dmac 1>;
528 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
534 reg = <0x0 0xff500000 0x0 0x1000>;
539 pinctrl-0 = <&i2c1_xfer>;
541 #size-cells = <0>;
547 reg = <0x0 0xff504000 0x0 0x1000>;
552 pinctrl-0 = <&i2c2m0_xfer>;
554 #size-cells = <0>;
560 reg = <0x0 0xff508000 0x0 0x1000>;
565 pinctrl-0 = <&i2c3_xfer>;
567 #size-cells = <0>;
573 reg = <0x0 0xff50c000 0x0 0x1000>;
578 pinctrl-0 = <&i2c4_xfer>;
580 #size-cells = <0>;
586 reg = <0x0 0xff100000 0x0 0x1000>;
591 pinctrl-0 = <&i2c5_xfer>;
593 #size-cells = <0>;
599 reg = <0x0 0xff520000 0x0 0x1000>;
602 #size-cells = <0>;
608 pinctrl-0 = <&spi0_clk &spi0_csn &spi0_miso &spi0_mosi>;
615 reg = <0x0 0xff530000 0x0 0x1000>;
618 #size-cells = <0>;
624 pinctrl-0 = <&spi1_clk &spi1_csn0 &spi1_csn1 &spi1_miso &spi1_mosi>;
631 reg = <0x0 0xff540000 0x0 0x100>;
640 pinctrl-0 = <&uart1m0_xfer &uart1_cts &uart1_rts>;
646 reg = <0x0 0xff550000 0x0 0x100>;
655 pinctrl-0 = <&uart2m0_xfer>;
661 reg = <0x0 0xff560000 0x0 0x100>;
670 pinctrl-0 = <&uart3m0_xfer &uart3_ctsm0 &uart3_rtsm0>;
676 reg = <0x0 0xff570000 0x0 0x100>;
685 pinctrl-0 = <&uart4_xfer &uart4_cts &uart4_rts>;
691 reg = <0x0 0xff580000 0x0 0x1000>;
694 #size-cells = <0>;
700 pinctrl-0 = <&spi2m0_clk &spi2m0_csn &spi2m0_miso &spi2m0_mosi>;
707 reg = <0x0 0xff5a0000 0x0 0x100>;
716 pinctrl-0 = <&uart5_xfer>;
722 reg = <0x0 0xff5b0000 0x0 0x100>;
731 pinctrl-0 = <&uart6_xfer>;
737 reg = <0x0 0xff5c0000 0x0 0x100>;
746 pinctrl-0 = <&uart7_xfer>;
752 reg = <0x0 0xffb00000 0x0 0x200>;
764 #size-cells = <0>;
766 vop_lite_out_dsi: endpoint@0 {
767 reg = <0>;
780 reg = <0x0 0xffb00f00 0x0 0x100>;
786 #iommu-cells = <0>;
792 reg = <0x0 0xffb40000 0x0 0x500>;
804 #size-cells = <0>;
806 vop_raw_out_csi: endpoint@0 {
807 reg = <0>;
815 reg = <0x0 0xffb40f00 0x0 0x100>;
821 #iommu-cells = <0>;
827 reg = <0x0 0xff5d0000 0x0 0x10>;
830 pinctrl-0 = <&pwm8_pin>;
838 reg = <0x0 0xff5d0010 0x0 0x10>;
841 pinctrl-0 = <&pwm9_pin>;
849 reg = <0x0 0xff5d0020 0x0 0x10>;
852 pinctrl-0 = <&pwm10_pin>;
860 reg = <0x0 0xff5d0030 0x0 0x10>;
863 pinctrl-0 = <&pwm11_pin>;
871 reg = <0x0 0xff630000 0x0 0x10000>;
880 reg = <0x0 0xff7e0000 0x0 0x1000>;
890 pinctrl-0 = <&i2s0_8ch_sclktx
908 reg = <0x0 0xff7f0000 0x0 0x1000>;
915 pinctrl-0 = <&i2s1_2ch_sclk
924 reg = <0x0 0xff800000 0x0 0x1000>;
932 pinctrl-0 = <&pdm_clk
943 reg = <0x0 0xff810000 0x0 0x10000>;
949 rockchip,audio-src = <0>;
950 rockchip,det-channel = <0>;
957 reg = <0x0 0xffb20000 0x0 0x500>;
972 #size-cells = <0>;
984 reg = <0x0 0xffb30000 0x0 0x500>;
995 #size-cells = <0>;
1009 reg = <0x0 0xffc50000 0x0 0x4000>;
1018 reg = <0x0 0xffc60000 0x0 0x4000>;
1023 fifo-depth = <0x100>;
1026 pinctrl-0 = <&sdmmc1_clk &sdmmc1_cmd &sdmmc1_bus4>;
1032 reg = <0x0 0xffbc0000 0x0 0x1000>;
1041 reg = <0x0 0xff3c0000 0x0 0x100>;
1053 reg = <0x0 0xffcf0000 0x0 0x4000>;
1058 fifo-depth = <0x100>;
1061 pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd>;
1067 reg = <0x0 0xffd00000 0x0 0x4000>;
1072 fifo-depth = <0x100>;
1079 reg = <0x0 0xffd80000 0x0 0x10000>;
1091 reg = <0x0 0xffd90000 0x0 0x10000>;
1103 reg = <0x0 0xffdd0000 0x0 0x10000>;
1117 pinctrl-0 = <&rgmii_pins>;
1134 reg = <0x0 0xff4c0000 0x0 0x100>;
1146 reg = <0x0 0xff690000 0x0 0x100>;
1158 reg = <0x0 0xff6a0000 0x0 0x100>;
1170 reg = <0x0 0xff6b0000 0x0 0x100>;
1182 reg = <0x0 0xff6c0000 0x0 0x100>;
1379 <0 RK_PB1 1 &pcfg_pull_none_smt>,
1381 <0 RK_PB0 1 &pcfg_pull_none_smt>;
1389 <0 RK_PC1 1 &pcfg_pull_none_smt>,
1391 <0 RK_PC0 1 &pcfg_pull_none_smt>;
1685 <0 RK_PB7 1 &pcfg_pull_none>;
1692 <0 RK_PC3 1 &pcfg_pull_none>;
1699 <0 RK_PC5 1 &pcfg_pull_none>;
1706 <0 RK_PC4 1 &pcfg_pull_none>;
2045 <0 RK_PB3 1 &pcfg_pull_none>,
2047 <0 RK_PB2 1 &pcfg_pull_none>;
2052 <0 RK_PB4 1 &pcfg_pull_none>;
2057 <0 RK_PB5 1 &pcfg_pull_none>;
2119 <0 RK_PC5 2 &pcfg_pull_none>,
2121 <0 RK_PC4 2 &pcfg_pull_none>;
2126 <0 RK_PC7 2 &pcfg_pull_none>;
2131 <0 RK_PD0 2 &pcfg_pull_none>;
2188 <0 RK_PA6 0 &pcfg_pull_none>;
2193 <0 RK_PA6 2 &pcfg_pull_none>;