Lines Matching +full:etheravb +full:- +full:rcar +full:- +full:gen3
11 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a7796-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
32 compatible = "arm,psci-1.0", "arm,psci-0.2";
37 #address-cells = <1>;
38 #size-cells = <0>;
41 compatible = "arm,cortex-a57", "arm,armv8";
44 power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
45 next-level-cache = <&L2_CA57>;
46 enable-method = "psci";
50 compatible = "arm,cortex-a57","arm,armv8";
53 power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
54 next-level-cache = <&L2_CA57>;
55 enable-method = "psci";
59 compatible = "arm,cortex-a53", "arm,armv8";
62 power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
63 next-level-cache = <&L2_CA53>;
64 enable-method = "psci";
68 compatible = "arm,cortex-a53","arm,armv8";
71 power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
72 next-level-cache = <&L2_CA53>;
73 enable-method = "psci";
77 compatible = "arm,cortex-a53","arm,armv8";
80 power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
81 next-level-cache = <&L2_CA53>;
82 enable-method = "psci";
86 compatible = "arm,cortex-a53","arm,armv8";
89 power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
90 next-level-cache = <&L2_CA53>;
91 enable-method = "psci";
94 L2_CA57: cache-controller-0 {
96 power-domains = <&sysc R8A7796_PD_CA57_SCU>;
97 cache-unified;
98 cache-level = <2>;
101 L2_CA53: cache-controller-1 {
103 power-domains = <&sysc R8A7796_PD_CA53_SCU>;
104 cache-unified;
105 cache-level = <2>;
110 compatible = "fixed-clock";
111 #clock-cells = <0>;
113 clock-frequency = <0>;
114 u-boot,dm-pre-reloc;
118 compatible = "fixed-clock";
119 #clock-cells = <0>;
121 clock-frequency = <0>;
122 u-boot,dm-pre-reloc;
125 /* External CAN clock - to be overridden by boards that provide it */
127 compatible = "fixed-clock";
128 #clock-cells = <0>;
129 clock-frequency = <0>;
132 /* External SCIF clock - to be overridden by boards that provide it */
134 compatible = "fixed-clock";
135 #clock-cells = <0>;
136 clock-frequency = <0>;
140 compatible = "simple-bus";
141 interrupt-parent = <&gic>;
142 #address-cells = <2>;
143 #size-cells = <2>;
145 u-boot,dm-pre-reloc;
147 gic: interrupt-controller@f1010000 {
148 compatible = "arm,gic-400";
149 #interrupt-cells = <3>;
150 #address-cells = <0>;
151 interrupt-controller;
159 clock-names = "clk";
160 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
165 compatible = "arm,armv8-timer";
177 compatible = "renesas,r8a7796-wdt",
178 "renesas,rcar-gen3-wdt";
181 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
187 compatible = "renesas,gpio-r8a7796",
188 "renesas,gpio-rcar";
191 #gpio-cells = <2>;
192 gpio-controller;
193 gpio-ranges = <&pfc 0 0 16>;
194 #interrupt-cells = <2>;
195 interrupt-controller;
197 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
202 compatible = "renesas,gpio-r8a7796",
203 "renesas,gpio-rcar";
206 #gpio-cells = <2>;
207 gpio-controller;
208 gpio-ranges = <&pfc 0 32 29>;
209 #interrupt-cells = <2>;
210 interrupt-controller;
212 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
217 compatible = "renesas,gpio-r8a7796",
218 "renesas,gpio-rcar";
221 #gpio-cells = <2>;
222 gpio-controller;
223 gpio-ranges = <&pfc 0 64 15>;
224 #interrupt-cells = <2>;
225 interrupt-controller;
227 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
232 compatible = "renesas,gpio-r8a7796",
233 "renesas,gpio-rcar";
236 #gpio-cells = <2>;
237 gpio-controller;
238 gpio-ranges = <&pfc 0 96 16>;
239 #interrupt-cells = <2>;
240 interrupt-controller;
242 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
247 compatible = "renesas,gpio-r8a7796",
248 "renesas,gpio-rcar";
251 #gpio-cells = <2>;
252 gpio-controller;
253 gpio-ranges = <&pfc 0 128 18>;
254 #interrupt-cells = <2>;
255 interrupt-controller;
257 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
262 compatible = "renesas,gpio-r8a7796",
263 "renesas,gpio-rcar";
266 #gpio-cells = <2>;
267 gpio-controller;
268 gpio-ranges = <&pfc 0 160 26>;
269 #interrupt-cells = <2>;
270 interrupt-controller;
272 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
277 compatible = "renesas,gpio-r8a7796",
278 "renesas,gpio-rcar";
281 #gpio-cells = <2>;
282 gpio-controller;
283 gpio-ranges = <&pfc 0 192 32>;
284 #interrupt-cells = <2>;
285 interrupt-controller;
287 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
292 compatible = "renesas,gpio-r8a7796",
293 "renesas,gpio-rcar";
296 #gpio-cells = <2>;
297 gpio-controller;
298 gpio-ranges = <&pfc 0 224 4>;
299 #interrupt-cells = <2>;
300 interrupt-controller;
302 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
306 pfc: pin-controller@e6060000 {
307 compatible = "renesas,pfc-r8a7796";
312 compatible = "arm,cortex-a57-pmu";
315 interrupt-affinity = <&a57_0>,
320 compatible = "arm,cortex-a53-pmu";
325 interrupt-affinity = <&a53_0>,
331 cpg: clock-controller@e6150000 {
332 compatible = "renesas,r8a7796-cpg-mssr";
335 clock-names = "extal", "extalr";
336 #clock-cells = <2>;
337 #power-domain-cells = <0>;
338 #reset-cells = <1>;
339 u-boot,dm-pre-reloc;
342 rst: reset-controller@e6160000 {
343 compatible = "renesas,r8a7796-rst";
352 sysc: system-controller@e6180000 {
353 compatible = "renesas,r8a7796-sysc";
355 #power-domain-cells = <1>;
359 #address-cells = <1>;
360 #size-cells = <0>;
361 compatible = "renesas,iic-r8a7796",
362 "renesas,rcar-gen3-iic",
363 "renesas,rmobile-iic";
367 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
373 #address-cells = <1>;
374 #size-cells = <0>;
375 compatible = "renesas,i2c-r8a7796",
376 "renesas,rcar-gen3-i2c";
380 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
384 dma-names = "tx", "rx", "tx", "rx";
385 i2c-scl-internal-delay-ns = <110>;
390 #address-cells = <1>;
391 #size-cells = <0>;
392 compatible = "renesas,i2c-r8a7796",
393 "renesas,rcar-gen3-i2c";
397 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
401 dma-names = "tx", "rx", "tx", "rx";
402 i2c-scl-internal-delay-ns = <6>;
407 #address-cells = <1>;
408 #size-cells = <0>;
409 compatible = "renesas,i2c-r8a7796",
410 "renesas,rcar-gen3-i2c";
414 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
418 dma-names = "tx", "rx", "tx", "rx";
419 i2c-scl-internal-delay-ns = <6>;
424 #address-cells = <1>;
425 #size-cells = <0>;
426 compatible = "renesas,i2c-r8a7796",
427 "renesas,rcar-gen3-i2c";
431 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
434 dma-names = "tx", "rx";
435 i2c-scl-internal-delay-ns = <110>;
440 #address-cells = <1>;
441 #size-cells = <0>;
442 compatible = "renesas,i2c-r8a7796",
443 "renesas,rcar-gen3-i2c";
447 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
450 dma-names = "tx", "rx";
451 i2c-scl-internal-delay-ns = <110>;
456 #address-cells = <1>;
457 #size-cells = <0>;
458 compatible = "renesas,i2c-r8a7796",
459 "renesas,rcar-gen3-i2c";
463 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
466 dma-names = "tx", "rx";
467 i2c-scl-internal-delay-ns = <110>;
472 #address-cells = <1>;
473 #size-cells = <0>;
474 compatible = "renesas,i2c-r8a7796",
475 "renesas,rcar-gen3-i2c";
479 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
482 dma-names = "tx", "rx";
483 i2c-scl-internal-delay-ns = <6>;
488 compatible = "renesas,can-r8a7796",
489 "renesas,rcar-gen3-can";
495 clock-names = "clkp1", "clkp2", "can_clk";
496 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
497 assigned-clock-rates = <40000000>;
498 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
504 compatible = "renesas,can-r8a7796",
505 "renesas,rcar-gen3-can";
511 clock-names = "clkp1", "clkp2", "can_clk";
512 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
513 assigned-clock-rates = <40000000>;
514 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
520 compatible = "renesas,r8a7796-canfd",
521 "renesas,rcar-gen3-canfd";
528 clock-names = "fck", "canfd", "can_clk";
529 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
530 assigned-clock-rates = <40000000>;
531 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
545 compatible = "renesas,etheravb-r8a7796",
546 "renesas,etheravb-rcar-gen3";
573 interrupt-names = "ch0", "ch1", "ch2", "ch3",
581 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
583 phy-mode = "rgmii-txid";
584 #address-cells = <1>;
585 #size-cells = <0>;
590 compatible = "renesas,hscif-r8a7796",
591 "renesas,rcar-gen3-hscif",
598 clock-names = "fck", "brg_int", "scif_clk";
601 dma-names = "tx", "rx", "tx", "rx";
602 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
608 compatible = "renesas,hscif-r8a7796",
609 "renesas,rcar-gen3-hscif",
616 clock-names = "fck", "brg_int", "scif_clk";
619 dma-names = "tx", "rx", "tx", "rx";
620 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
626 compatible = "renesas,hscif-r8a7796",
627 "renesas,rcar-gen3-hscif",
634 clock-names = "fck", "brg_int", "scif_clk";
637 dma-names = "tx", "rx", "tx", "rx";
638 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
644 compatible = "renesas,hscif-r8a7796",
645 "renesas,rcar-gen3-hscif",
652 clock-names = "fck", "brg_int", "scif_clk";
654 dma-names = "tx", "rx";
655 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
661 compatible = "renesas,hscif-r8a7796",
662 "renesas,rcar-gen3-hscif",
669 clock-names = "fck", "brg_int", "scif_clk";
671 dma-names = "tx", "rx";
672 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
678 compatible = "renesas,scif-r8a7796",
679 "renesas,rcar-gen3-scif", "renesas,scif";
685 clock-names = "fck", "brg_int", "scif_clk";
688 dma-names = "tx", "rx", "tx", "rx";
689 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
695 compatible = "renesas,scif-r8a7796",
696 "renesas,rcar-gen3-scif", "renesas,scif";
702 clock-names = "fck", "brg_int", "scif_clk";
705 dma-names = "tx", "rx", "tx", "rx";
706 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
712 compatible = "renesas,scif-r8a7796",
713 "renesas,rcar-gen3-scif", "renesas,scif";
719 clock-names = "fck", "brg_int", "scif_clk";
720 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
726 compatible = "renesas,scif-r8a7796",
727 "renesas,rcar-gen3-scif", "renesas,scif";
733 clock-names = "fck", "brg_int", "scif_clk";
735 dma-names = "tx", "rx";
736 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
742 compatible = "renesas,scif-r8a7796",
743 "renesas,rcar-gen3-scif", "renesas,scif";
749 clock-names = "fck", "brg_int", "scif_clk";
751 dma-names = "tx", "rx";
752 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
758 compatible = "renesas,scif-r8a7796",
759 "renesas,rcar-gen3-scif", "renesas,scif";
765 clock-names = "fck", "brg_int", "scif_clk";
768 dma-names = "tx", "rx", "tx", "rx";
769 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
775 compatible = "renesas,msiof-r8a7796",
776 "renesas,rcar-gen3-msiof";
782 dma-names = "tx", "rx";
783 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
785 #address-cells = <1>;
786 #size-cells = <0>;
791 compatible = "renesas,msiof-r8a7796",
792 "renesas,rcar-gen3-msiof";
798 dma-names = "tx", "rx";
799 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
801 #address-cells = <1>;
802 #size-cells = <0>;
807 compatible = "renesas,msiof-r8a7796",
808 "renesas,rcar-gen3-msiof";
813 dma-names = "tx", "rx";
814 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
816 #address-cells = <1>;
817 #size-cells = <0>;
822 compatible = "renesas,msiof-r8a7796",
823 "renesas,rcar-gen3-msiof";
828 dma-names = "tx", "rx";
829 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
831 #address-cells = <1>;
832 #size-cells = <0>;
836 dmac0: dma-controller@e6700000 {
837 compatible = "renesas,dmac-r8a7796",
838 "renesas,rcar-dmac";
857 interrupt-names = "error",
863 clock-names = "fck";
864 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
866 #dma-cells = <1>;
867 dma-channels = <16>;
870 dmac1: dma-controller@e7300000 {
871 compatible = "renesas,dmac-r8a7796",
872 "renesas,rcar-dmac";
891 interrupt-names = "error",
897 clock-names = "fck";
898 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
900 #dma-cells = <1>;
901 dma-channels = <16>;
904 dmac2: dma-controller@e7310000 {
905 compatible = "renesas,dmac-r8a7796",
906 "renesas,rcar-dmac";
925 interrupt-names = "error",
931 clock-names = "fck";
932 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
934 #dma-cells = <1>;
935 dma-channels = <16>;
939 compatible = "renesas,sdhi-r8a7796";
943 max-frequency = <200000000>;
944 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
950 compatible = "renesas,sdhi-r8a7796";
954 max-frequency = <200000000>;
955 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
961 compatible = "renesas,sdhi-r8a7796";
965 max-frequency = <200000000>;
966 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
972 compatible = "renesas,sdhi-r8a7796";
976 max-frequency = <200000000>;
977 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
983 compatible = "renesas,r8a7796-thermal";
991 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
993 #thermal-sensor-cells = <1>;
997 thermal-zones {
998 sensor_thermal1: sensor-thermal1 {
999 polling-delay-passive = <250>;
1000 polling-delay = <1000>;
1001 thermal-sensors = <&tsc 0>;
1004 sensor1_crit: sensor1-crit {
1012 sensor_thermal2: sensor-thermal2 {
1013 polling-delay-passive = <250>;
1014 polling-delay = <1000>;
1015 thermal-sensors = <&tsc 1>;
1018 sensor2_crit: sensor2-crit {
1026 sensor_thermal3: sensor-thermal3 {
1027 polling-delay-passive = <250>;
1028 polling-delay = <1000>;
1029 thermal-sensors = <&tsc 2>;
1032 sensor3_crit: sensor3-crit {