Lines Matching +full:pwm +full:- +full:rcar
11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a7795-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
32 compatible = "arm,psci-1.0", "arm,psci-0.2";
37 #address-cells = <1>;
38 #size-cells = <0>;
41 compatible = "arm,cortex-a57", "arm,armv8";
44 power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
45 next-level-cache = <&L2_CA57>;
46 enable-method = "psci";
50 compatible = "arm,cortex-a57","arm,armv8";
53 power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
54 next-level-cache = <&L2_CA57>;
55 enable-method = "psci";
59 compatible = "arm,cortex-a57","arm,armv8";
62 power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
63 next-level-cache = <&L2_CA57>;
64 enable-method = "psci";
68 compatible = "arm,cortex-a57","arm,armv8";
71 power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
72 next-level-cache = <&L2_CA57>;
73 enable-method = "psci";
77 compatible = "arm,cortex-a53", "arm,armv8";
80 power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
81 next-level-cache = <&L2_CA53>;
82 enable-method = "psci";
86 compatible = "arm,cortex-a53","arm,armv8";
89 power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
90 next-level-cache = <&L2_CA53>;
91 enable-method = "psci";
95 compatible = "arm,cortex-a53","arm,armv8";
98 power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
99 next-level-cache = <&L2_CA53>;
100 enable-method = "psci";
104 compatible = "arm,cortex-a53","arm,armv8";
107 power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
108 next-level-cache = <&L2_CA53>;
109 enable-method = "psci";
112 L2_CA57: cache-controller-0 {
114 power-domains = <&sysc R8A7795_PD_CA57_SCU>;
115 cache-unified;
116 cache-level = <2>;
119 L2_CA53: cache-controller-1 {
121 power-domains = <&sysc R8A7795_PD_CA53_SCU>;
122 cache-unified;
123 cache-level = <2>;
128 compatible = "fixed-clock";
129 #clock-cells = <0>;
131 clock-frequency = <0>;
132 u-boot,dm-pre-reloc;
136 compatible = "fixed-clock";
137 #clock-cells = <0>;
139 clock-frequency = <0>;
140 u-boot,dm-pre-reloc;
149 compatible = "fixed-clock";
150 #clock-cells = <0>;
151 clock-frequency = <0>;
155 compatible = "fixed-clock";
156 #clock-cells = <0>;
157 clock-frequency = <0>;
161 compatible = "fixed-clock";
162 #clock-cells = <0>;
163 clock-frequency = <0>;
166 /* External CAN clock - to be overridden by boards that provide it */
168 compatible = "fixed-clock";
169 #clock-cells = <0>;
170 clock-frequency = <0>;
173 /* External SCIF clock - to be overridden by boards that provide it */
175 compatible = "fixed-clock";
176 #clock-cells = <0>;
177 clock-frequency = <0>;
180 /* External PCIe clock - can be overridden by the board */
182 compatible = "fixed-clock";
183 #clock-cells = <0>;
184 clock-frequency = <0>;
188 compatible = "simple-bus";
189 interrupt-parent = <&gic>;
191 #address-cells = <2>;
192 #size-cells = <2>;
194 u-boot,dm-pre-reloc;
196 gic: interrupt-controller@f1010000 {
197 compatible = "arm,gic-400";
198 #interrupt-cells = <3>;
199 #address-cells = <0>;
200 interrupt-controller;
208 clock-names = "clk";
209 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
214 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
217 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
223 compatible = "renesas,gpio-r8a7795",
224 "renesas,gpio-rcar";
227 #gpio-cells = <2>;
228 gpio-controller;
229 gpio-ranges = <&pfc 0 0 16>;
230 #interrupt-cells = <2>;
231 interrupt-controller;
233 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
238 compatible = "renesas,gpio-r8a7795",
239 "renesas,gpio-rcar";
242 #gpio-cells = <2>;
243 gpio-controller;
244 gpio-ranges = <&pfc 0 32 28>;
245 #interrupt-cells = <2>;
246 interrupt-controller;
248 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
253 compatible = "renesas,gpio-r8a7795",
254 "renesas,gpio-rcar";
257 #gpio-cells = <2>;
258 gpio-controller;
259 gpio-ranges = <&pfc 0 64 15>;
260 #interrupt-cells = <2>;
261 interrupt-controller;
263 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
268 compatible = "renesas,gpio-r8a7795",
269 "renesas,gpio-rcar";
272 #gpio-cells = <2>;
273 gpio-controller;
274 gpio-ranges = <&pfc 0 96 16>;
275 #interrupt-cells = <2>;
276 interrupt-controller;
278 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
283 compatible = "renesas,gpio-r8a7795",
284 "renesas,gpio-rcar";
287 #gpio-cells = <2>;
288 gpio-controller;
289 gpio-ranges = <&pfc 0 128 18>;
290 #interrupt-cells = <2>;
291 interrupt-controller;
293 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
298 compatible = "renesas,gpio-r8a7795",
299 "renesas,gpio-rcar";
302 #gpio-cells = <2>;
303 gpio-controller;
304 gpio-ranges = <&pfc 0 160 26>;
305 #interrupt-cells = <2>;
306 interrupt-controller;
308 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
313 compatible = "renesas,gpio-r8a7795",
314 "renesas,gpio-rcar";
317 #gpio-cells = <2>;
318 gpio-controller;
319 gpio-ranges = <&pfc 0 192 32>;
320 #interrupt-cells = <2>;
321 interrupt-controller;
323 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
328 compatible = "renesas,gpio-r8a7795",
329 "renesas,gpio-rcar";
332 #gpio-cells = <2>;
333 gpio-controller;
334 gpio-ranges = <&pfc 0 224 4>;
335 #interrupt-cells = <2>;
336 interrupt-controller;
338 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
343 compatible = "arm,cortex-a57-pmu";
348 interrupt-affinity = <&a57_0>,
355 compatible = "arm,cortex-a53-pmu";
360 interrupt-affinity = <&a53_0>,
367 compatible = "arm,armv8-timer";
378 cpg: clock-controller@e6150000 {
379 compatible = "renesas,r8a7795-cpg-mssr";
382 clock-names = "extal", "extalr";
383 #clock-cells = <2>;
384 #power-domain-cells = <0>;
385 #reset-cells = <1>;
386 u-boot,dm-pre-reloc;
389 rst: reset-controller@e6160000 {
390 compatible = "renesas,r8a7795-rst";
399 sysc: system-controller@e6180000 {
400 compatible = "renesas,r8a7795-sysc";
402 #power-domain-cells = <1>;
406 compatible = "renesas,pfc-r8a7795";
410 intc_ex: interrupt-controller@e61c0000 {
411 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
412 #interrupt-cells = <2>;
413 interrupt-controller;
422 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
426 dmac0: dma-controller@e6700000 {
427 compatible = "renesas,dmac-r8a7795",
428 "renesas,rcar-dmac";
447 interrupt-names = "error",
453 clock-names = "fck";
454 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
456 #dma-cells = <1>;
457 dma-channels = <16>;
460 dmac1: dma-controller@e7300000 {
461 compatible = "renesas,dmac-r8a7795",
462 "renesas,rcar-dmac";
481 interrupt-names = "error",
487 clock-names = "fck";
488 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
490 #dma-cells = <1>;
491 dma-channels = <16>;
494 dmac2: dma-controller@e7310000 {
495 compatible = "renesas,dmac-r8a7795",
496 "renesas,rcar-dmac";
515 interrupt-names = "error",
521 clock-names = "fck";
522 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
524 #dma-cells = <1>;
525 dma-channels = <16>;
528 audma0: dma-controller@ec700000 {
529 compatible = "renesas,dmac-r8a7795",
530 "renesas,rcar-dmac";
549 interrupt-names = "error",
555 clock-names = "fck";
556 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
558 #dma-cells = <1>;
559 dma-channels = <16>;
562 audma1: dma-controller@ec720000 {
563 compatible = "renesas,dmac-r8a7795",
564 "renesas,rcar-dmac";
583 interrupt-names = "error",
589 clock-names = "fck";
590 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
592 #dma-cells = <1>;
593 dma-channels = <16>;
597 compatible = "renesas,etheravb-r8a7795",
598 "renesas,etheravb-rcar-gen3";
625 interrupt-names = "ch0", "ch1", "ch2", "ch3",
633 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
635 phy-mode = "rgmii-txid";
636 #address-cells = <1>;
637 #size-cells = <0>;
642 compatible = "renesas,can-r8a7795",
643 "renesas,rcar-gen3-can";
649 clock-names = "clkp1", "clkp2", "can_clk";
650 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
651 assigned-clock-rates = <40000000>;
652 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
658 compatible = "renesas,can-r8a7795",
659 "renesas,rcar-gen3-can";
665 clock-names = "clkp1", "clkp2", "can_clk";
666 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
667 assigned-clock-rates = <40000000>;
668 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
674 compatible = "renesas,r8a7795-canfd",
675 "renesas,rcar-gen3-canfd";
682 clock-names = "fck", "canfd", "can_clk";
683 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
684 assigned-clock-rates = <40000000>;
685 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
699 compatible = "renesas,hscif-r8a7795",
700 "renesas,rcar-gen3-hscif",
707 clock-names = "fck", "brg_int", "scif_clk";
709 dma-names = "tx", "rx";
710 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
716 compatible = "renesas,hscif-r8a7795",
717 "renesas,rcar-gen3-hscif",
724 clock-names = "fck", "brg_int", "scif_clk";
726 dma-names = "tx", "rx";
727 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
733 compatible = "renesas,hscif-r8a7795",
734 "renesas,rcar-gen3-hscif",
741 clock-names = "fck", "brg_int", "scif_clk";
743 dma-names = "tx", "rx";
744 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
750 compatible = "renesas,hscif-r8a7795",
751 "renesas,rcar-gen3-hscif",
758 clock-names = "fck", "brg_int", "scif_clk";
760 dma-names = "tx", "rx";
761 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
767 compatible = "renesas,hscif-r8a7795",
768 "renesas,rcar-gen3-hscif",
775 clock-names = "fck", "brg_int", "scif_clk";
777 dma-names = "tx", "rx";
778 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
784 compatible = "renesas,scif-r8a7795",
785 "renesas,rcar-gen3-scif", "renesas,scif";
791 clock-names = "fck", "brg_int", "scif_clk";
793 dma-names = "tx", "rx";
794 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
800 compatible = "renesas,scif-r8a7795",
801 "renesas,rcar-gen3-scif", "renesas,scif";
807 clock-names = "fck", "brg_int", "scif_clk";
809 dma-names = "tx", "rx";
810 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
816 compatible = "renesas,scif-r8a7795",
817 "renesas,rcar-gen3-scif", "renesas,scif";
823 clock-names = "fck", "brg_int", "scif_clk";
825 dma-names = "tx", "rx";
826 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
832 compatible = "renesas,scif-r8a7795",
833 "renesas,rcar-gen3-scif", "renesas,scif";
839 clock-names = "fck", "brg_int", "scif_clk";
841 dma-names = "tx", "rx";
842 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
848 compatible = "renesas,scif-r8a7795",
849 "renesas,rcar-gen3-scif", "renesas,scif";
855 clock-names = "fck", "brg_int", "scif_clk";
857 dma-names = "tx", "rx";
858 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
864 compatible = "renesas,scif-r8a7795",
865 "renesas,rcar-gen3-scif", "renesas,scif";
871 clock-names = "fck", "brg_int", "scif_clk";
873 dma-names = "tx", "rx";
874 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
880 #address-cells = <1>;
881 #size-cells = <0>;
882 compatible = "renesas,iic-r8a7795",
883 "renesas,rcar-gen3-iic",
884 "renesas,rmobile-iic";
888 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
894 #address-cells = <1>;
895 #size-cells = <0>;
896 compatible = "renesas,i2c-r8a7795",
897 "renesas,rcar-gen3-i2c";
901 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
904 dma-names = "tx", "rx";
905 i2c-scl-internal-delay-ns = <110>;
910 #address-cells = <1>;
911 #size-cells = <0>;
912 compatible = "renesas,i2c-r8a7795",
913 "renesas,rcar-gen3-i2c";
917 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
920 dma-names = "tx", "rx";
921 i2c-scl-internal-delay-ns = <6>;
926 #address-cells = <1>;
927 #size-cells = <0>;
928 compatible = "renesas,i2c-r8a7795",
929 "renesas,rcar-gen3-i2c";
933 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
936 dma-names = "tx", "rx";
937 i2c-scl-internal-delay-ns = <6>;
942 #address-cells = <1>;
943 #size-cells = <0>;
944 compatible = "renesas,i2c-r8a7795",
945 "renesas,rcar-gen3-i2c";
949 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
952 dma-names = "tx", "rx";
953 i2c-scl-internal-delay-ns = <110>;
958 #address-cells = <1>;
959 #size-cells = <0>;
960 compatible = "renesas,i2c-r8a7795",
961 "renesas,rcar-gen3-i2c";
965 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
968 dma-names = "tx", "rx";
969 i2c-scl-internal-delay-ns = <110>;
974 #address-cells = <1>;
975 #size-cells = <0>;
976 compatible = "renesas,i2c-r8a7795",
977 "renesas,rcar-gen3-i2c";
981 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
984 dma-names = "tx", "rx";
985 i2c-scl-internal-delay-ns = <110>;
990 #address-cells = <1>;
991 #size-cells = <0>;
992 compatible = "renesas,i2c-r8a7795",
993 "renesas,rcar-gen3-i2c";
997 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1000 dma-names = "tx", "rx";
1001 i2c-scl-internal-delay-ns = <6>;
1005 pwm0: pwm@e6e30000 {
1006 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1009 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1011 #pwm-cells = <2>;
1015 pwm1: pwm@e6e31000 {
1016 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1019 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1021 #pwm-cells = <2>;
1025 pwm2: pwm@e6e32000 {
1026 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1029 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1031 #pwm-cells = <2>;
1035 pwm3: pwm@e6e33000 {
1036 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1039 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1041 #pwm-cells = <2>;
1045 pwm4: pwm@e6e34000 {
1046 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1049 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1051 #pwm-cells = <2>;
1055 pwm5: pwm@e6e35000 {
1056 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1059 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1061 #pwm-cells = <2>;
1065 pwm6: pwm@e6e36000 {
1066 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1069 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1071 #pwm-cells = <2>;
1077 * #sound-dai-cells is required
1079 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1080 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1083 * #clock-cells is required for audio_clkout0/1/2/3
1085 * clkout : #clock-cells = <0>; <&rcar_sound>;
1086 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1088 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
1094 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1113 clock-names = "ssi-all",
1124 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1128 dvc0: dvc-0 {
1130 dma-names = "tx";
1132 dvc1: dvc-1 {
1134 dma-names = "tx";
1139 mix0: mix-0 { };
1140 mix1: mix-1 { };
1144 ctu00: ctu-0 { };
1145 ctu01: ctu-1 { };
1146 ctu02: ctu-2 { };
1147 ctu03: ctu-3 { };
1148 ctu10: ctu-4 { };
1149 ctu11: ctu-5 { };
1150 ctu12: ctu-6 { };
1151 ctu13: ctu-7 { };
1155 src0: src-0 {
1158 dma-names = "rx", "tx";
1160 src1: src-1 {
1163 dma-names = "rx", "tx";
1165 src2: src-2 {
1168 dma-names = "rx", "tx";
1170 src3: src-3 {
1173 dma-names = "rx", "tx";
1175 src4: src-4 {
1178 dma-names = "rx", "tx";
1180 src5: src-5 {
1183 dma-names = "rx", "tx";
1185 src6: src-6 {
1188 dma-names = "rx", "tx";
1190 src7: src-7 {
1193 dma-names = "rx", "tx";
1195 src8: src-8 {
1198 dma-names = "rx", "tx";
1200 src9: src-9 {
1203 dma-names = "rx", "tx";
1208 ssi0: ssi-0 {
1211 dma-names = "rx", "tx", "rxu", "txu";
1213 ssi1: ssi-1 {
1216 dma-names = "rx", "tx", "rxu", "txu";
1218 ssi2: ssi-2 {
1221 dma-names = "rx", "tx", "rxu", "txu";
1223 ssi3: ssi-3 {
1226 dma-names = "rx", "tx", "rxu", "txu";
1228 ssi4: ssi-4 {
1231 dma-names = "rx", "tx", "rxu", "txu";
1233 ssi5: ssi-5 {
1236 dma-names = "rx", "tx", "rxu", "txu";
1238 ssi6: ssi-6 {
1241 dma-names = "rx", "tx", "rxu", "txu";
1243 ssi7: ssi-7 {
1246 dma-names = "rx", "tx", "rxu", "txu";
1248 ssi8: ssi-8 {
1251 dma-names = "rx", "tx", "rxu", "txu";
1253 ssi9: ssi-9 {
1256 dma-names = "rx", "tx", "rxu", "txu";
1262 compatible = "renesas,sata-r8a7795";
1266 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1272 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1276 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1282 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1286 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1291 usb_dmac0: dma-controller@e65a0000 {
1292 compatible = "renesas,r8a7795-usb-dmac",
1293 "renesas,usb-dmac";
1297 interrupt-names = "ch0", "ch1";
1299 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1301 #dma-cells = <1>;
1302 dma-channels = <2>;
1305 usb_dmac1: dma-controller@e65b0000 {
1306 compatible = "renesas,r8a7795-usb-dmac",
1307 "renesas,usb-dmac";
1311 interrupt-names = "ch0", "ch1";
1313 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1315 #dma-cells = <1>;
1316 dma-channels = <2>;
1320 compatible = "renesas,sdhi-r8a7795";
1324 max-frequency = <200000000>;
1325 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1331 compatible = "renesas,sdhi-r8a7795";
1335 max-frequency = <200000000>;
1336 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1342 compatible = "renesas,sdhi-r8a7795";
1346 max-frequency = <200000000>;
1347 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1353 compatible = "renesas,sdhi-r8a7795";
1357 max-frequency = <200000000>;
1358 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1363 usb2_phy0: usb-phy@ee080200 {
1364 compatible = "renesas,usb2-phy-r8a7795",
1365 "renesas,rcar-gen3-usb2-phy";
1369 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1371 #phy-cells = <0>;
1375 usb2_phy1: usb-phy@ee0a0200 {
1376 compatible = "renesas,usb2-phy-r8a7795",
1377 "renesas,rcar-gen3-usb2-phy";
1380 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1382 #phy-cells = <0>;
1386 usb2_phy2: usb-phy@ee0c0200 {
1387 compatible = "renesas,usb2-phy-r8a7795",
1388 "renesas,rcar-gen3-usb2-phy";
1391 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1393 #phy-cells = <0>;
1398 compatible = "generic-ehci";
1403 phy-names = "usb";
1404 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1410 compatible = "generic-ehci";
1415 phy-names = "usb";
1416 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1422 compatible = "generic-ehci";
1427 phy-names = "usb";
1428 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1434 compatible = "generic-ohci";
1439 phy-names = "usb";
1440 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1446 compatible = "generic-ohci";
1451 phy-names = "usb";
1452 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1458 compatible = "generic-ohci";
1463 phy-names = "usb";
1464 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1470 compatible = "renesas,usbhs-r8a7795",
1471 "renesas,rcar-gen3-usbhs";
1477 dma-names = "ch0", "ch1", "ch2", "ch3";
1480 phy-names = "usb";
1481 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1487 compatible = "renesas,pcie-r8a7795",
1488 "renesas,pcie-rcar-gen3";
1490 #address-cells = <3>;
1491 #size-cells = <2>;
1492 bus-range = <0x00 0xff>;
1499 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1503 #interrupt-cells = <1>;
1504 interrupt-map-mask = <0 0 0 0>;
1505 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1507 clock-names = "pcie", "pcie_bus";
1508 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1514 compatible = "renesas,pcie-r8a7795",
1515 "renesas,pcie-rcar-gen3";
1517 #address-cells = <3>;
1518 #size-cells = <2>;
1519 bus-range = <0x00 0xff>;
1526 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1530 #interrupt-cells = <1>;
1531 interrupt-map-mask = <0 0 0 0>;
1532 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1534 clock-names = "pcie", "pcie_bus";
1535 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1545 power-domains = <&sysc R8A7795_PD_A3VP>;
1555 power-domains = <&sysc R8A7795_PD_A3VP>;
1563 power-domains = <&sysc R8A7795_PD_A3VP>;
1571 power-domains = <&sysc R8A7795_PD_A3VP>;
1579 power-domains = <&sysc R8A7795_PD_A3VP>;
1588 power-domains = <&sysc R8A7795_PD_A3VP>;
1598 power-domains = <&sysc R8A7795_PD_A3VP>;
1607 power-domains = <&sysc R8A7795_PD_A3VP>;
1617 power-domains = <&sysc R8A7795_PD_A3VP>;
1626 power-domains = <&sysc R8A7795_PD_A3VP>;
1636 power-domains = <&sysc R8A7795_PD_A3VP>;
1645 power-domains = <&sysc R8A7795_PD_A3VP>;
1655 power-domains = <&sysc R8A7795_PD_A3VP>;
1664 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1674 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1683 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1693 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1702 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1712 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1721 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1731 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1740 power-domains = <&sysc R8A7795_PD_A3VP>;
1750 power-domains = <&sysc R8A7795_PD_A3VP>;
1760 power-domains = <&sysc R8A7795_PD_A3VP>;
1766 compatible = "renesas,du-r8a7795";
1769 reg-names = "du", "lvds.0";
1779 clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
1785 #address-cells = <1>;
1786 #size-cells = <0>;
1812 compatible = "renesas,r8a7795-thermal";
1820 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1822 #thermal-sensor-cells = <1>;
1826 thermal-zones {
1827 sensor_thermal1: sensor-thermal1 {
1828 polling-delay-passive = <250>;
1829 polling-delay = <1000>;
1830 thermal-sensors = <&tsc 0>;
1833 sensor1_crit: sensor1-crit {
1841 sensor_thermal2: sensor-thermal2 {
1842 polling-delay-passive = <250>;
1843 polling-delay = <1000>;
1844 thermal-sensors = <&tsc 1>;
1847 sensor2_crit: sensor2-crit {
1855 sensor_thermal3: sensor-thermal3 {
1856 polling-delay-passive = <250>;
1857 polling-delay = <1000>;
1858 thermal-sensors = <&tsc 2>;
1861 sensor3_crit: sensor3-crit {