arm/dts/r8a7795.dtsi

11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
207 			clocks = <&cpg CPG_MOD 408>;
210 			resets = <&cpg 408>;
216 			clocks = <&cpg CPG_MOD 402>;
218 			resets = <&cpg 402>;
232 			clocks = <&cpg CPG_MOD 912>;
234 			resets = <&cpg 912>;
247 			clocks = <&cpg CPG_MOD 911>;
249 			resets = <&cpg 911>;
262 			clocks = <&cpg CPG_MOD 910>;
264 			resets = <&cpg 910>;
277 			clocks = <&cpg CPG_MOD 909>;
279 			resets = <&cpg 909>;
292 			clocks = <&cpg CPG_MOD 908>;
294 			resets = <&cpg 908>;
307 			clocks = <&cpg CPG_MOD 907>;
309 			resets = <&cpg 907>;
322 			clocks = <&cpg CPG_MOD 906>;
324 			resets = <&cpg 906>;
337 			clocks = <&cpg CPG_MOD 905>;
339 			resets = <&cpg 905>;
378 		cpg: clock-controller@e6150000 {  label
379 			compatible = "renesas,r8a7795-cpg-mssr";
421 			clocks = <&cpg CPG_MOD 407>;
423 			resets = <&cpg 407>;
452 			clocks = <&cpg CPG_MOD 219>;
455 			resets = <&cpg 219>;
486 			clocks = <&cpg CPG_MOD 218>;
489 			resets = <&cpg 218>;
520 			clocks = <&cpg CPG_MOD 217>;
523 			resets = <&cpg 217>;
554 			clocks = <&cpg CPG_MOD 502>;
557 			resets = <&cpg 502>;
588 			clocks = <&cpg CPG_MOD 501>;
591 			resets = <&cpg 501>;
632 			clocks = <&cpg CPG_MOD 812>;
634 			resets = <&cpg 812>;
646 			clocks = <&cpg CPG_MOD 916>,
647 			       <&cpg CPG_CORE R8A7795_CLK_CANFD>,
650 			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
653 			resets = <&cpg 916>;
662 			clocks = <&cpg CPG_MOD 915>,
663 			       <&cpg CPG_CORE R8A7795_CLK_CANFD>,
666 			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
669 			resets = <&cpg 915>;
679 			clocks = <&cpg CPG_MOD 914>,
680 			       <&cpg CPG_CORE R8A7795_CLK_CANFD>,
683 			assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
686 			resets = <&cpg 914>;
704 			clocks = <&cpg CPG_MOD 520>,
705 				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
711 			resets = <&cpg 520>;
721 			clocks = <&cpg CPG_MOD 519>,
722 				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
728 			resets = <&cpg 519>;
738 			clocks = <&cpg CPG_MOD 518>,
739 				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
745 			resets = <&cpg 518>;
755 			clocks = <&cpg CPG_MOD 517>,
756 				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
762 			resets = <&cpg 517>;
772 			clocks = <&cpg CPG_MOD 516>,
773 				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
779 			resets = <&cpg 516>;
788 			clocks = <&cpg CPG_MOD 207>,
789 				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
795 			resets = <&cpg 207>;
804 			clocks = <&cpg CPG_MOD 206>,
805 				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
811 			resets = <&cpg 206>;
820 			clocks = <&cpg CPG_MOD 310>,
821 				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
827 			resets = <&cpg 310>;
836 			clocks = <&cpg CPG_MOD 204>,
837 				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
843 			resets = <&cpg 204>;
852 			clocks = <&cpg CPG_MOD 203>,
853 				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
859 			resets = <&cpg 203>;
868 			clocks = <&cpg CPG_MOD 202>,
869 				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
875 			resets = <&cpg 202>;
887 			clocks = <&cpg CPG_MOD 926>;
889 			resets = <&cpg 926>;
900 			clocks = <&cpg CPG_MOD 931>;
902 			resets = <&cpg 931>;
916 			clocks = <&cpg CPG_MOD 930>;
918 			resets = <&cpg 930>;
932 			clocks = <&cpg CPG_MOD 929>;
934 			resets = <&cpg 929>;
948 			clocks = <&cpg CPG_MOD 928>;
950 			resets = <&cpg 928>;
964 			clocks = <&cpg CPG_MOD 927>;
966 			resets = <&cpg 927>;
980 			clocks = <&cpg CPG_MOD 919>;
982 			resets = <&cpg 919>;
996 			clocks = <&cpg CPG_MOD 918>;
998 			resets = <&cpg 918>;
1008 			clocks = <&cpg CPG_MOD 523>;
1010 			resets = <&cpg 523>;
1018 			clocks = <&cpg CPG_MOD 523>;
1020 			resets = <&cpg 523>;
1028 			clocks = <&cpg CPG_MOD 523>;
1030 			resets = <&cpg 523>;
1038 			clocks = <&cpg CPG_MOD 523>;
1040 			resets = <&cpg 523>;
1048 			clocks = <&cpg CPG_MOD 523>;
1050 			resets = <&cpg 523>;
1058 			clocks = <&cpg CPG_MOD 523>;
1060 			resets = <&cpg 523>;
1068 			clocks = <&cpg CPG_MOD 523>;
1070 			resets = <&cpg 523>;
1096 			clocks = <&cpg CPG_MOD 1005>,
1097 				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1098 				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1099 				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1100 				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1101 				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1102 				 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1103 				 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1104 				 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1105 				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1106 				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1107 				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1108 				 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1109 				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1112 				 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
1265 			clocks = <&cpg CPG_MOD 815>;
1267 			resets = <&cpg 815>;
1275 			clocks = <&cpg CPG_MOD 328>;
1277 			resets = <&cpg 328>;
1285 			clocks = <&cpg CPG_MOD 327>;
1287 			resets = <&cpg 327>;
1298 			clocks = <&cpg CPG_MOD 330>;
1300 			resets = <&cpg 330>;
1312 			clocks = <&cpg CPG_MOD 331>;
1314 			resets = <&cpg 331>;
1323 			clocks = <&cpg CPG_MOD 314>;
1326 			resets = <&cpg 314>;
1334 			clocks = <&cpg CPG_MOD 313>;
1337 			resets = <&cpg 313>;
1345 			clocks = <&cpg CPG_MOD 312>;
1348 			resets = <&cpg 312>;
1356 			clocks = <&cpg CPG_MOD 311>;
1359 			resets = <&cpg 311>;
1368 			clocks = <&cpg CPG_MOD 703>;
1370 			resets = <&cpg 703>;
1379 			clocks = <&cpg CPG_MOD 702>;
1381 			resets = <&cpg 702>;
1390 			clocks = <&cpg CPG_MOD 701>;
1392 			resets = <&cpg 701>;
1401 			clocks = <&cpg CPG_MOD 703>;
1405 			resets = <&cpg 703>;
1413 			clocks = <&cpg CPG_MOD 702>;
1417 			resets = <&cpg 702>;
1425 			clocks = <&cpg CPG_MOD 701>;
1429 			resets = <&cpg 701>;
1437 			clocks = <&cpg CPG_MOD 703>;
1441 			resets = <&cpg 703>;
1449 			clocks = <&cpg CPG_MOD 702>;
1453 			resets = <&cpg 702>;
1461 			clocks = <&cpg CPG_MOD 701>;
1465 			resets = <&cpg 701>;
1474 			clocks = <&cpg CPG_MOD 704>;
1482 			resets = <&cpg 704>;
1506 			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1509 			resets = <&cpg 319>;
1533 			clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1536 			resets = <&cpg 318>;
1544 			clocks = <&cpg CPG_MOD 624>;
1546 			resets = <&cpg 624>;
1554 			clocks = <&cpg CPG_MOD 606>;
1556 			resets = <&cpg 606>;
1562 			clocks = <&cpg CPG_MOD 615>;
1564 			resets = <&cpg 615>;
1570 			clocks = <&cpg CPG_MOD 614>;
1572 			resets = <&cpg 614>;
1578 			clocks = <&cpg CPG_MOD 613>;
1580 			resets = <&cpg 613>;
1587 			clocks = <&cpg CPG_MOD 626>;
1589 			resets = <&cpg 626>;
1597 			clocks = <&cpg CPG_MOD 607>;
1599 			resets = <&cpg 607>;
1606 			clocks = <&cpg CPG_MOD 631>;
1608 			resets = <&cpg 631>;
1616 			clocks = <&cpg CPG_MOD 611>;
1618 			resets = <&cpg 611>;
1625 			clocks = <&cpg CPG_MOD 630>;
1627 			resets = <&cpg 630>;
1635 			clocks = <&cpg CPG_MOD 610>;
1637 			resets = <&cpg 610>;
1644 			clocks = <&cpg CPG_MOD 629>;
1646 			resets = <&cpg 629>;
1654 			clocks = <&cpg CPG_MOD 609>;
1656 			resets = <&cpg 609>;
1663 			clocks = <&cpg CPG_MOD 623>;
1665 			resets = <&cpg 623>;
1673 			clocks = <&cpg CPG_MOD 603>;
1675 			resets = <&cpg 603>;
1682 			clocks = <&cpg CPG_MOD 622>;
1684 			resets = <&cpg 622>;
1692 			clocks = <&cpg CPG_MOD 602>;
1694 			resets = <&cpg 602>;
1701 			clocks = <&cpg CPG_MOD 621>;
1703 			resets = <&cpg 621>;
1711 			clocks = <&cpg CPG_MOD 601>;
1713 			resets = <&cpg 601>;
1720 			clocks = <&cpg CPG_MOD 620>;
1722 			resets = <&cpg 620>;
1730 			clocks = <&cpg CPG_MOD 600>;
1732 			resets = <&cpg 600>;
1739 			clocks = <&cpg CPG_MOD 119>;
1741 			resets = <&cpg 119>;
1749 			clocks = <&cpg CPG_MOD 118>;
1751 			resets = <&cpg 118>;
1759 			clocks = <&cpg CPG_MOD 117>;
1761 			resets = <&cpg 117>;
1774 			clocks = <&cpg CPG_MOD 724>,
1775 				 <&cpg CPG_MOD 723>,
1776 				 <&cpg CPG_MOD 722>,
1777 				 <&cpg CPG_MOD 721>,
1778 				 <&cpg CPG_MOD 727>;
1819 			clocks = <&cpg CPG_MOD 522>;
1821 			resets = <&cpg 522>;