Lines Matching full:clkc
46 #include <dt-bindings/clock/gxbb-clkc.h>
59 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
69 clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
78 clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
90 clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
101 clocks = <&clkc CLKID_ETH>,
102 <&clkc CLKID_FCLK_DIV2>,
103 <&clkc CLKID_MPLL2>;
525 clkc: clock-controller@0 { label
526 compatible = "amlogic,gxbb-clkc";
549 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
557 assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
558 <&clkc CLKID_MALI_0>,
559 <&clkc CLKID_MALI>; /* Glitch free mux */
560 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
562 <&clkc CLKID_MALI_0>;
570 clocks = <&clkc CLKID_I2C>;
574 clocks = <&clkc CLKID_AO_I2C>;
578 clocks = <&clkc CLKID_I2C>;
582 clocks = <&clkc CLKID_I2C>;
588 <&clkc CLKID_SAR_ADC>,
589 <&clkc CLKID_SANA>,
590 <&clkc CLKID_SAR_ADC_CLK>,
591 <&clkc CLKID_SAR_ADC_SEL>;
596 clocks = <&clkc CLKID_SD_EMMC_A>,
598 <&clkc CLKID_FCLK_DIV2>;
603 clocks = <&clkc CLKID_SD_EMMC_B>,
605 <&clkc CLKID_FCLK_DIV2>;
610 clocks = <&clkc CLKID_SD_EMMC_C>,
612 <&clkc CLKID_FCLK_DIV2>;
617 clocks = <&clkc CLKID_SPI>;
625 clocks = <&clkc CLKID_RNG0>;
635 clocks = <&clkc CLKID_HDMI_PCLK>,
636 <&clkc CLKID_CLK81>,
637 <&clkc CLKID_GCLK_VENCI_INT0>;